M30622SAFP#U5 Renesas Electronics America, M30622SAFP#U5 Datasheet - Page 78
M30622SAFP#U5
Manufacturer Part Number
M30622SAFP#U5
Description
IC M16C MPU ROMLESS 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets
1.QSK-62P_PLUS.pdf
(103 pages)
2.M30622SAFPU5.pdf
(277 pages)
3.M30622SAFPU5.pdf
(617 pages)
4.M30622SAFPU5.pdf
(308 pages)
Specifications of M30622SAFP#U5
Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
50
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- QSK-62P_PLUS PDF datasheet
- M30622SAFPU5 PDF datasheet #2
- M30622SAFPU5 PDF datasheet #3
- M30622SAFPU5 PDF datasheet #4
- Current page: 78 of 617
- Download datasheet (9Mb)
Interrupt
Figure 1.11.6. State of stack before and after acceptance of interrupt request
Saving Registers
In the interrupt sequence, only the contents of the flag register (FLG) and that of the program counter
(PC) are saved in the stack area.
First, the processor saves the four higher-order bits of the program counter, and 4 upper-order bits and 8
lower-order bits of the FLG register, 16 bits in total, in the stack area, then saves 16 lower-order bits of the
program counter. Figure 1.11.6 shows the state of the stack as it was before the acceptance of the
interrupt request, and the state the stack after the acceptance of the interrupt request.
Save other necessary registers at the beginning of the interrupt routine using software. Using the
PUSHM instruction alone can save all the registers except the stack pointer (SP).
Address
m – 4
m – 3
m – 2
m – 1
Stack status before interrupt request
is acknowledged
m + 1
m
MSB
Content of previous stack
Content of previous stack
Stack area
LSB
[SP]
Stack pointer
value before
interrupt occurs
Address
m – 4
m – 3
m – 2
m – 1
m
m + 1
Stack status after interrupt request
is acknowledged
MSB
Flag register
Content of previous stack
Content of previous stack
Program counter (PC
Program counter (PC
(FLG
Flag register (FLG
Stack area
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
H
)
counter (PC
Program
L
)
L
M
)
)
LSB
H
)
M16C / 62A Group
Mitsubishi microcomputers
[SP]
New stack
pointer value
1-57
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