HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 47

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

The operand size is indicated by the letter B (byte) or W (word). Some instructions have
restrictions on the size of operands they handle.
The abbreviation EAs or EAd (effective address of source or destination) is used for operands that
permit more than one addressing mode. The H8/300L CPU supports the following eight
addressing modes. The method of calculating effective addresses is explained in section 1.3.4,
Addressing Modes and Effective Address Calculation, above.
Notation
Rn
@Rn
@(d:16, Rn)
@Rn+/@–Rn
@aa:8/@aa:16
#xx:8/#xx:16
@(d:8, PC)
@@aa:8
Operand size: Word or byte. Byte size is indicated for bit-manipulation instructions because these
instructions access a full byte in order to read or write one bit.
Condition code: The effect of instruction execution on the flag bits in CCR is indicated. The
following notation is used:
Description: The action of the instruction is described in detail.
Symbol
0
*
Addressing Mode
Register direct
Register indirect
Register indirect with displacement
Register indirect with post-increment/pre-decrement
Absolute address
Immediate
Program-counter relative
Memory indirect
Meaning
The flag is altered according to the result of the instruction.
The flag is cleared to "0."
The flag is not changed.
Not fixed; the flag is left in an unpredictable state.
Rev. 2.00 Dec 27, 2004 page 33 of 128
Section 2 Instruction Set
REJ09B0214-0200