R5F61668RN50FPV Renesas Electronics America, R5F61668RN50FPV Datasheet - Page 219

• Manufacturer Part Number: R5F61668RN50FPV
• Description: IC H8SX/1668 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61668RN50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• For Use With: R0K561668S000BE - KIT STARTER FOR H8SX/1668R0K561664S001BE - KIT STARTER FOR H8SX/1651HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

• The bus start (BS) and read/write (RD/WR) signals can be output.
A block diagram of the bus controller is shown in figure 9.1.
EXDMAC bus acknowledge signal
DMAC bus acknowledge signal
CPU bus acknowledge signal
DTC bus acknowledge signal
EXDMAC bus request signal
DMAC bus request signal
CPU bus request signal
DTC bus request signal
Internal data bus
[Legend]
ABWCR:
ASTCR:
WTCRA:
WTCRB:
RDNCR:
CSACR:
IDLCR:
BCR1:
BCR2:
ENDIANCR:
EXDMAC address bus
Internal bus
control signals
DMAC address bus
CPU address bus
DTC address bus
Bus width control register
Access state control register
Wait control register A
Wait control register B
Read strobe timing control register
CS assertion period control register
Idle control register
Bus control register 1
Bus control register 2
Endian control register
Figure 9.1 Block Diagram of Bus Controller
Control registers
Internal
BCR2
arbiter
bus
Internal bus
control unit
Address
Refresh timer
selector
ABWCR
WTCRA
WTCRB
RDNCR
ASTCR
CSACR
IDLCR
BCR1
ENDIANCR
SRAMCR:
BROMCR:
MPXCR:
DRAMCR:
DRACCR:
SDCR:
REFCR:
RTCNT:
RTCOR:
Rev. 2.00 Sep. 24, 2008 Page 185 of 1468
RTCNT
SRAM mode control register
Burst ROM interface control register
Address/data multiplexed I/O control register
DRAM control register
DRAM access control register
Synchronous DRAM control register
Refresh control register
Refresh timer counter
Refresh time constant register
Area decoder
External bus
External bus
control unit
BROMCR
SRAMCR
DRAMCR
DRACCR
MPXCR
REFCR
arbiter
SDCR
RTCOR
Section 9 Bus Controller (BSC)
REJ09B0412-0200
CS7 to CS0
External bus
control signals
WAIT
BREQ
BACK
BREQO