ST72F321BR9T6 STMicroelectronics, ST72F321BR9T6 Datasheet - Page 37

MCU 8BIT 60KB FLASH/ROM 64-LQFP

ST72F321BR9T6

Manufacturer Part Number
ST72F321BR9T6
Description
MCU 8BIT 60KB FLASH/ROM 64-LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F321BR9T6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7232X-EVAL, ST7232X-SK/RAIS, ST72321B-D/RAIS, ST7MDT20-DVP3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Cpu Family
ST7
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
2KB
# I/os (max)
48
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3.8V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
LQFP
For Use With
497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-5586

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST72F321BR9T6
Quantity:
7 020
Part Number:
ST72F321BR9T6
Manufacturer:
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Quantity:
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0
INTERRUPTS (Cont’d)
Table 8. Interrupt Mapping
Notes:
1. Exit from HALT possible when SPI is in slave mode.
2. Exit from HALT possible when PWM ART is in external clock mode.
7.6 EXTERNAL INTERRUPTS
7.6.1 I/O Port Interrupt Sensitivity
The external interrupt sensitivity is controlled by
the IPA, IPB and ISxx bits of the EICR register
(Figure
independent external interrupt source sensitivities.
Each external interrupt source can be generated
on four (or five) different events on the pin:
10
11
12
13
Falling edge
Rising edge
Falling and rising edge
0
1
2
3
4
5
6
7
8
9
23). This control allows to have up to 4 fully
MCC/RTC
PWM ART
TIMER A
TIMER B
Source
RESET
Block
TRAP
AVD
SPI
SCI
I2C
TLI
ei0
ei1
ei2
ei3
Reset
Software interrupt
External top level interrupt
Main clock controller time base interrupt
External interrupt port A3..0
External interrupt port F2..0
External interrupt port B3..0
External interrupt port B7..4
SPI peripheral interrupts
TIMER A peripheral interrupts
TIMER B peripheral interrupts
SCI Peripheral interrupts
Auxiliary Voltage detector interrupt
I2C Peripheral interrupts
PWM ART interrupt
Not used
Description
ST72321BRx, ST72321BARx ST72321BJx, ST72321BKx
To guarantee correct functionality, the sensitivity
bits in the EICR register can be modified only
when the I1 and I0 bits of the CC register are both
set to 1 (level 3). This means that interrupts must
be disabled before changing sensitivity.
The pending interrupts are cleared by writing a dif-
ferent value in the ISx[1:0], IPA or IPB bits of the
EICR.
Falling edge and low level
Rising edge and high level (only for ei0 and ei2)
(see periph)
Register
ARTCSR
MCCSR
SPICSR
SICSR
SCISR
Label
TASR
TBSR
EICR
N/A
N/A
Priority
Priority
Priority
Higher
Order
Lower
ACTIVE
HALT/
HALT
from
yes
yes
Exit
yes
yes
yes
yes
yes
yes
yes
no
no
no
no
no
no
1
2
FFECh-FFEDh
FFFCh-FFFDh
FFEEh-FFEFh
FFEAh-FFEBh
FFFEh-FFFFh
FFFAh-FFFBh
FFE8h-FFE9h
FFE6h-FFE7h
FFE4h-FFE5h
FFE2h-FFE3h
FFE0h-FFE1h
FFF8h-FFF9h
FFF6h-FFF7h
FFF4h-FFF5h
FFF2h-FFF3h
FFF0h-FFF1h
Address
Vector
37/187

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