C8051F705-GM Silicon Laboratories Inc, C8051F705-GM Datasheet - Page 238

• Manufacturer Part Number: C8051F705-GM
• Description: IC 8051 MCU 15K FLASH 48-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F70xr

Specifications of C8051F705-GM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Cap Sense, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 15KB (15K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 32 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN
• Processor Series: C8051F7x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F700DK
• Minimum Operating Temperature: - 40 C
• Height: 0.95 mm
• Length: 7 mm
• Supply Voltage (max): 1.9 V, 3.6 V
• Supply Voltage (min): 1.7 V, 1.8 V
• Width: 7 mm
• For Use With: 336-1635 - DEV KIT FOR C8051F700
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1612-5

C8051F70x/71x
238
Table 30.5. SMBus Status Decoding: Hardware ACK Disabled (EHACK = 0) (Continued)
0010 0
0001 0
0000 1
1100
1110
Values Read
Values Read
Table 30.6. SMBus Status Decoding: Hardware ACK Enabled (EHACK = 1)
0
0
0
1 X
1 X
1 X
0 X
0
0
0
1
Lost arbitration while attempt-
ing a repeated START.
Lost arbitration due to a
detected STOP.
Lost arbitration while transmit-
ting a data byte as master.
A master START was gener-
ated.
A master data or address byte
was transmitted; NACK
received.
A master data or address byte
was transmitted; ACK
received.
Current SMbus State
Current SMbus State
Rev. 1.0
Abort failed transfer.
Reschedule failed transfer.
Abort failed transfer.
Reschedule failed transfer.
Abort failed transfer.
Reschedule failed transfer.
Load slave address + R/W into
SMB0DAT.
Set STA to restart transfer.
Abort transfer.
Load next data byte into
SMB0DAT.
End transfer with STOP.
End transfer with STOP and start
another transfer.
Send repeated START.
Switch to Master Receiver Mode
(clear SI without writing new data
to SMB0DAT). Set ACK for initial
data byte.
Typical Response Options
Typical Response Options
Values to
Values to
0
1
0
1
0
1
0
1
0
0
0
1
1
0
Write
Write
0 X
0 X
0 X
0 X
0 0
0 0
0 X 1100
0 X
1 X
0 X 1100
1 X
1 X
0 X
0 1
1000
1110
1110
1110
1110
1110
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