C8051F705-GM Silicon Laboratories Inc, C8051F705-GM Datasheet - Page 289

IC 8051 MCU 15K FLASH 48-QFN

C8051F705-GM

Manufacturer Part Number
C8051F705-GM
Description
IC 8051 MCU 15K FLASH 48-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F70xr
Datasheets

Specifications of C8051F705-GM

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Cap Sense, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
15KB (15K x 8)
Program Memory Type
FLASH
Eeprom Size
32 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Processor Series
C8051F7x
Core
8051
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
39
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F700DK
Minimum Operating Temperature
- 40 C
Height
0.95 mm
Length
7 mm
Supply Voltage (max)
1.9 V, 3.6 V
Supply Voltage (min)
1.7 V, 1.8 V
Width
7 mm
For Use With
336-1635 - DEV KIT FOR C8051F700
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
336-1612-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F705-GM
Manufacturer:
Silicon Laboratories Inc
Quantity:
135
34.3.2. Software Timer (Compare) Mode
In Software Timer mode, the PCA counter/timer value is compared to the module's 16-bit capture/compare
register (PCA0CPHn and PCA0CPLn). When a match occurs, the Capture/Compare Flag (CCFn) in
PCA0CN is set to logic 1. An interrupt request is generated if the CCFn interrupt for that module is
enabled. The CCFn bit is not automatically cleared by hardware when the CPU vectors to the interrupt ser-
vice routine, and must be cleared by software. Setting the ECOMn and MATn bits in the PCA0CPMn regis-
ter enables Software Timer mode.
Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0 Cap-
ture/Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the
ECOMn bit to 0; writing to PCA0CPHn sets ECOMn to 1.
PCA0CPLn
Write to
Reset
PCA0CPHn
Write to
0
ENB
ENB
1
W
M
P
1
6
n
Figure 34.5. PCA Software Timer Mode Diagram
x
E
C
O
M
n
PCA0CPMn
C
A
P
P
n
0 0
C
A
P
N
n
M
A
T
n
O
G
T
n
0 0
W
M
P
n
C
C
E
F
n
x
Enable
PCA
Timebase
Rev. 1.0
PCA0CPLn
PCA0L
16-bit Comparator
PCA0CPHn
PCA0H
C8051F70x/71x
Match
C
F
C
R
PCA0CN
0
1
C
C
F
2
C
C
F
1
C
C
F
0
PCA Interrupt
289

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