C8051F347-GM Silicon Laboratories Inc, C8051F347-GM Datasheet - Page 240

• Manufacturer Part Number: C8051F347-GM
• Description: IC 8051 MCU 32K FLASH MEM 32-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F34xr

Specifications of C8051F347-GM

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 32-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 25
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 21x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2304 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-F34X, KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F340DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1748 - ADAPTER TOOLSTICK FOR C8051F34X770-1006 - ISP 4PORT FOR SILABS C8051F MCU
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1348-5

C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
240
Bit7:
Bit6:
Bits5–4: T1M1–T1M0: Timer 1 Mode Select.
Bit3:
Bit2:
Bits1–0: T0M1–T0M0: Timer 0 Mode Select.
GATE1
R/W
Bit7
GATE1: Timer 1 Gate Control.
0: Timer 1 enabled when TR1 = 1 irrespective of INT1 logic level.
1: Timer 1 enabled only when TR1 = 1 AND INT1 is active as defined by bit IN1PL in register
INT01CF (see SFR Definition 9.13).
C/T1: Counter/Timer 1 Select.
0: Timer Function: Timer 1 incremented by clock defined by T1M bit (CKCON.3).
1: Counter Function: Timer 1 incremented by high-to-low transitions on external input pin
(T1).
These bits select the Timer 1 operation mode.
GATE0: Timer 0 Gate Control.
0: Timer 0 enabled when TR0 = 1 irrespective of INT0 logic level.
1: Timer 0 enabled only when TR0 = 1 AND INT0 is active as defined by bit IN0PL in register
INT01CF (see SFR Definition 9.13).
C/T0: Counter/Timer Select.
0: Timer Function: Timer 0 incremented by clock defined by T0M bit (CKCON.2).
1: Counter Function: Timer 0 incremented by high-to-low transitions on external input pin
(T0).
These bits select the Timer 0 operation mode.
T1M1
T0M1
C/T1
0
0
1
1
0
0
1
1
R/W
Bit6
T1M0
T0M0
0
1
0
1
0
1
0
1
SFR Definition 21.2. TMOD: Timer Mode
T1M1
R/W
Bit5
Mode 3: Two 8-bit counter/timers
Mode 2: 8-bit counter/timer with
Mode 2: 8-bit counter/timer with
T1M0
Mode 0: 13-bit counter/timer
Mode 1: 16-bit counter/timer
Mode 0: 13-bit counter/timer
Mode 1: 16-bit counter/timer
R/W
Bit4
Mode 3: Timer 1 inactive
auto-reload
auto-reload
Rev. 1.3
GATE0
Mode
Mode
R/W
Bit3
C/T0
R/W
Bit2
T0M1
R/W
Bit1
T0M0
R/W
Bit0
SFR Address:
00000000
Reset Value
0x89