HD6417041AVF16V Renesas Electronics America, HD6417041AVF16V Datasheet - Page 157

IC SUPERH MCU ROMLESS 144QFP

HD6417041AVF16V

Manufacturer Part Number
HD6417041AVF16V
Description
IC SUPERH MCU ROMLESS 144QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7040r
Datasheets

Specifications of HD6417041AVF16V

Core Processor
SH-2
Core Size
32-Bit
Speed
28.7MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417041AVF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
6.1.8
Description: Branches unconditionally after executing the instruction following this BRA
instruction. The branch destination is an address specified by PC + displacement However, in this
case it is used for address calculation. The PC is the address 4 bytes after this instruction. The 12-
bit displacement is sign-extended and doubled. Consequently, the relative interval from the branch
destination is –4096 to +4094 bytes. If the displacement is too short to reach the branch
destination, this instruction must be changed to the JMP instruction. Here, a MOV instruction
must be used to transfer the destination address to a register.
Note: Since this is a delayed branch instruction, the instruction after BRA is executed before
Operation:
Format
BRA
BRA(long d)
{
}
unsigned long temp;
long disp;
if ((d&0x800)==0) disp=(0x00000FFF & (long) d);
else disp=(0xFFFFF000 | (long) d);
temp=PC;
PC=PC+(disp<<1);
Delay_Slot(temp+2);
label disp
branching. No interrupts and address errors are accepted between this instruction and the
next instruction. If the next instruction is a branch instruction, it is acknowledged as an
illegal slot instruction.
BRA (Branch): Branch Instruction
Abstract
/* BRA disp */
2 + PC
PC
Code
1010dddddddddddd 2
Rev. 5.00 Jun 30, 2004 page 141 of 512
Cycle T Bit SH-1 SH-2
Section 6 Instruction Descriptions
REJ09B0171-0500O
Instructions
Applicable
SH-
DSP

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