HD64F3437TFI16V Renesas Electronics America, HD64F3437TFI16V Datasheet - Page 143

• Manufacturer Part Number: HD64F3437TFI16V
• Description: MCU FLASH 60K 100-TQFP
• Manufacturer: Renesas Electronics America

Specifications of HD64F3437TFI16V

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.3.2
Table 7.4 summarizes the port 2 registers.
Table 7.4
Name
Port 2 data direction register
Port 2 data register
Port 2 input pull-up control
register
Port 2 Data Direction Register (P2DDR)
Mode 1
Modes 2 and 3
P2DDR controls the input/output direction of each pin in port 2.
Mode 1: The P2DDR values are fixed at 1. Port 2 consists of upper address output pins. P2DDR
values cannot be modified and are always read as 1.
In hardware standby mode, the address bus is in the high-impedance state.
Mode 2: A pin in port 2 is used for address output if the corresponding P2DDR bit is set to 1, and
for general input if this bit is cleared to 0.
Mode 3: A pin in port 2 is used for general output if the corresponding P2DDR bit is set to 1, and
for general input if this bit is cleared to 0.
In modes 2 and 3, P2DDR is a write-only register. Read data is invalid. If read, all bits always read
1. P2DDR is initialized to H'00 by a reset and in hardware standby mode. In software standby
mode it retains its existing values, so if a transition to software standby mode occurs while a
P2DDR bit is set to 1, the corresponding pin remains in the output state.
Bit
Initial value
Read/Write
Initial value
Read/Write
Register Configuration and Descriptions
Port 2 Registers
P2
7
—
W
7
DDR P2
1
0
6
—
W
6
DDR P2
1
0
Abbreviation
P2DDR
P2DR
P2PCR
5
—
W
5
DDR P2
1
0
Read/Write
W
R/W
R/W
4
—
W
4
DDR P2
1
0
3
—
W
3
DDR P2
1
0
Initial Value
H'FF (mode 1)
H'00 (modes 2 and 3)
H'00
H'00
2
—
W
2
DDR P2
1
0
1
—
W
1
DDR P2
1
0
Address
H'FFB1
H'FFB3
H'FFAD
0
—
W
0
DDR
1
0
111