ATTINY40-MMHR Atmel, ATTINY40-MMHR Datasheet - Page 13

• Manufacturer Part Number: ATTINY40-MMHR
• Description: MCU AVR 4KB FLASH 12MHZ 3X3 QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY40-MMHR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

4.8
4.8.1
4.8.2
8263A–AVR–08/10
Register Description
CCP – Configuration Change Protection Register
SPH and SPL – Stack Pointer Register
• Bits 7:0 – CCP[7:0]: Configuration Change Protection
In order to change the contents of a protected I/O register the CCP register must first be written
with the correct signature. After CCP is written the protected I/O registers may be written to dur-
ing the next four CPU instruction cycles. All interrupts are ignored during these cycles. After
these cycles interrupts are automatically handled again by the CPU, and any pending interrupts
will be executed according to their priority.
When the protected I/O register signature is written, CCP0 will read as one as long as the pro-
tected feature is enabled, while CCP[7:1] will always read as zero.
Table 4-1
Table 4-1.
Notes:
• Bits 15:0 – SP[15:0]: Stack Pointer
The Stack Pointer register points to the top of the stack, which is implemented as growing from
higher memory locations to lower memory locations. Hence, a stack PUSH command decreases
the Stack Pointer. The stack space in the data SRAM must be defined by the program before
any subroutine calls are executed or interrupts are enabled.
The Stack Pointer in ATtiny40 is implemented as two 8-bit registers in the I/O space.
Bit
0x3C
Read/Write
Initial Value
Bit
0x3E
0x3D
Read/Write
Read/Write
Initial Value
Initial Value
Signature
0xD8
1. Only WDE and WDP[3:0] bits are protected in WDTCSR.
2. Only BODS bit is protected in MCUCR.
shows the signatures that are in recognised.
Signatures Recognised by the Configuration Change Protection Register
RAMEND
RAMEND
SP15
R/W
SP7
Group
IOREG: CLKMSR, CLKPSR, WDTCSR
W
7
0
15
R
7
RAMEND
RAMEND
SP14
SP6
R/W
W
6
0
14
R
6
RAMEND
RAMEND
SP13
SP5
R/W
W
5
0
13
R
5
RAMEND
RAMEND
SP12
SP4
R/W
W
4
0
12
R
4
CCP[7:0]
RAMEND
RAMEND
(1)
SP11
SP3
R/W
W
3
0
11
, MCUCR
R
3
RAMEND
RAMEND
SP10
SP2
R/W
W
(2)
2
0
10
R
2
Description
Protected I/O register
RAMEND
RAMEND
SP9
SP1
R/W
W
1
0
R
9
1
RAMEND
RAMEND
R/W
SP8
SP0
W
0
0
R
8
0
CCP
SPH
SPL
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