ATTINY40-MMHR Atmel, ATTINY40-MMHR Datasheet - Page 24

• Manufacturer Part Number: ATTINY40-MMHR
• Description: MCU AVR 4KB FLASH 12MHZ 3X3 QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY40-MMHR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.5
6.5.1
6.5.2
24
Register Description
ATtiny40
CLKMSR – Clock Main Settings Register
CLKPSR – Clock Prescale Register
• Bits 7:2 – Res: Reserved Bits
These bits are reserved and will always read as zero.
• Bits 1:0 – CLKMS[1:0]: Clock Main Select Bits
These bits select the main clock source of the system. The bits can be written at run-time to
switch the source of the main clock. The clock system ensures glitch free switching of the main
clock source.
The main clock alternatives are shown in
Table 6-3.
To avoid unintentional switching of main clock source, a protected change sequence must be
followed to change the CLKMS bits, as follows:
• Bits 7:4 – Res: Reserved Bits
These bits are reserved and will always read as zero.
• Bits 3:0 – CLKPS[3:0]: Clock Prescaler Select Bits 3 - 0
These bits define the division factor between the selected clock source and the internal system
clock. These bits can be written at run-time to vary the clock frequency and suit the application
Bit
0x37
Read/Write
Initial Value
Bit
0x36
Read/Write
Initial Value
1. Write the signature for change enable of protected I/O register to register CCP
2. Within four instruction cycles, write the CLKMS bits with the desired value
CLKM1
0
0
1
1
Selection of Main Clock
R
R
7
–
0
7
–
0
CLKM0
0
1
0
1
R
R
6
–
0
6
–
0
R
R
5
–
0
5
–
0
Main Clock Source
Calibrated Internal 8 MHzOscillator
Internal 128 kHz Oscillator (WDT Oscillator)
External clock
Reserved
R
R
0
0
4
–
4
–
Table
CLKPS3
6-3.
R/W
3
–
R
0
3
0
CLKPS2
R
2
–
0
R/W
2
0
CLKMS1
CLKPS1
R/W
1
0
R/W
1
1
CLKMS0
R/W
CLKPS0
0
0
R/W
0
1
CLKMSR
8263A–AVR–08/10
CLKPSR