ATTINY40-MMHR Atmel, ATTINY40-MMHR Datasheet - Page 88

• Manufacturer Part Number: ATTINY40-MMHR
• Description: MCU AVR 4KB FLASH 12MHZ 3X3 QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY40-MMHR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 12-3.
12.7.1
12.7.2
88
Mode
0
1
2
3
4
ATtiny40
Normal, 8-bit Mode
Clear Timer on Compare Match (CTC) 8-bit Mode
ICEN1
0
0
0
1
1
Modes of operation
TCW1
0
0
1
0
1
Table 12-3
In Normal 8-bit mode (see
when it passes its maximum 8-bit value (MAX = 0xFF) and then restarts from the bottom (0x00).
The Overflow Flag (TOV1) is set in the same timer clock cycle as when TCNT1L becomes zero.
The TOV1 Flag in this case behaves like a ninth bit, except that it is only set, not cleared. How-
ever, combined with the timer overflow interrupt that automatically clears the TOV1 Flag, the
timer resolution can be increased by software. There are no special cases to consider in the
Normal 8-bit mode, a new counter value can be written anytime. The Output Compare Unit can
be used to generate interrupts at some given time.
In Clear Timer on Compare or CTC mode, see
used to manipulate the counter resolution. In CTC mode the counter is cleared to zero when the
counter value (TCNT1) matches the OCR1A. The OCR1A defines the top value for the counter,
hence also its resolution. This mode allows greater control of the Compare Match output fre-
quency. It also simplifies the operation of counting external events.
The timing diagram for the CTC mode is shown in
increases until a Compare Match occurs between TCNT1 and OCR1A, and then counter
(TCNT1) is cleared.
Figure 12-4. CTC Mode, Timing Diagram
An interrupt can be generated each time the counter value reaches the TOP value by using the
OCF1A Flag. If the interrupt is enabled, the interrupt handler routine can be used for updating
the TOP value. However, changing TOP to a value close to BOTTOM when the counter is run-
ning with none or a low prescaler value must be done with care since the CTC mode does not
have the double buffering feature. If the new value written to OCR1A is lower than the current
value of TCNT1, the counter will miss the Compare Match. The counter will then have to count to
TCNTn
Period
CTC1
0
1
X
X
X
summarises the different modes of operation.
Mode of Operation
Normal, 8-bit Mode
CTC Mode, 8-bit
Normal, 16-bit Mode
Input Capture Mode, 8-bit
Input Capture Mode, 16-bit
1
Table
12-3), the counter (TCNT1L) is incrementing until it overruns
2
3
0xFFFF
0xFFFF
OCR0A
0xFF
0xFF
TOP
Table 12-3 on page
Figure
4
Update of OCRx at
12-4. The counter value (TCNT1)
Immediate
Immediate
Immediate
Immediate
Immediate
88, the OCR1A Register is
OCnx Interrupt Flag Set
TOV Flag Set on
MAX (0xFFFF)
MAX (0xFFFF)
MAX (0xFF)
MAX (0xFF)
MAX (0xFF)
8263A–AVR–08/10