ATTINY40-MMHR Atmel, ATTINY40-MMHR Datasheet - Page 18
ATTINY40-MMHR
Manufacturer Part Number
ATTINY40-MMHR
Description
MCU AVR 4KB FLASH 12MHZ 3X3 QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY40-MMHR.pdf
(216 pages)
Specifications of ATTINY40-MMHR
Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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5.3
18
I/O Memory
ATtiny40
RAM address given by RAMAR is fetched and written to the destination register within the same
instruction cycle.
The I/O space definition of the ATtiny40 is shown in
All ATtiny40 I/Os and peripherals are placed in the I/O space. All I/O locations may be accessed
using the LD and ST instructions, enabling data transfer between the 16 general purpose work-
ing registers and the I/O space. I/O Registers within the address range 0x00 - 0x1F are directly
bit-accessible using the SBI and CBI instructions. In these registers, the value of single bits can
be checked by using the SBIS and SBIC instructions. See document “AVR Instruction Set” and
section
commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used.
Assembly Code Example
C Code Example
RAM_write:
RAM_read:
void RAM_write(unsigned char ucAddress, unsigned char ucData)
{
}
void RAM_read(unsigned char ucAddress, unsigned char ucData)
{
}
; Set up address (r17) in address register
out RAMAR, r17
; Write data (r16) to data register
out RAMDR, r16
ret
; Set up address (r17) in address register
out RAMAR, r17
; Read data (r16) from data register
in
ret
/* Set up address register */
RAMAR = ucAddress;
/* Write data into RAMDR */
RAMDR = ucData;
/* Set up address register */
RAMAR = ucAddress;
/* Read data from RAMDR */
ucData = RAMDR;
“Instruction Set Summary” on page 203
r16, RAMDR
for more details. When using the I/O specific
“Register Summary” on page
201.
8263A–AVR–08/10
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