DSPIC30F2020-30I/MMB32 Microchip Technology, DSPIC30F2020-30I/MMB32 Datasheet - Page 165
![IC DSPIC MCU/DSP 12K 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
DSPIC30F2020-30I/MMB32
Manufacturer Part Number
DSPIC30F2020-30I/MMB32
Description
IC DSPIC MCU/DSP 12K 28QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.AC164335.pdf
(286 pages)
2.DSPIC30F2011-20IP.pdf
(26 pages)
3.DSPIC30F1010-30ISO.pdf
(26 pages)
4.DSPIC30F1010-30ISO.pdf
(50 pages)
Specifications of DSPIC30F2020-30I/MMB32
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-QFN
For Use With
DM300023 - KIT DEMO DSPICDEM SMPS BUCK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
Q4035438A
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F2020-30I/MMB32
Manufacturer:
Microchip Technology
Quantity:
135
- AC164335 PDF datasheet
- DSPIC30F2011-20IP PDF datasheet #2
- DSPIC30F1010-30ISO PDF datasheet #3
- DSPIC30F1010-30ISO PDF datasheet #4
- Current page: 165 of 286
- Download datasheet (5Mb)
15.2
1.
2.
3.
4.
5.
6.
15.3
1.
2.
3.
4.
5.
6.
© 2006 Microchip Technology Inc.
Set up the UART:
a)
b)
c)
Enable the UART.
Set the UTXEN bit (causes a transmit interrupt).
Write data byte to lower byte of TXxREG word.
The value will be immediately transferred to the
Transmit Shift Register (TSR), and the serial bit
stream will start shifting out with next rising edge
of the baud clock.
Alternately, the data byte may be transferred
while UTXEN = 0, and then the user may set
UTXEN. This will cause the serial bit stream to
begin immediately because the baud clock will
start from a cleared state.
A transmit interrupt will be generated as per
interrupt control bit, UTXISELx.
Set up the UART (as described in Section 15.2
“Transmitting in 8-bit Data Mode”).
Enable the UART.
Set the UTXEN bit (causes a transmit interrupt).
Write TXxREG as a 16-bit value only.
A word write to TXxREG triggers the transfer of
the 9-bit data to the TSR. Serial bit stream will
start shifting out with the first rising edge of the
baud clock.
A transmit interrupt will be generated as per the
setting of control bit, UTXISELx.
Transmitting in 8-bit Data Mode
Write appropriate values for data, parity and
Stop bits.
Write appropriate baud rate value to the
U1BRG register.
Set up transmit and receive interrupt enable
and priority bits.
Transmitting in 9-bit Data Mode
Preliminary
15.4
The following sequence will send a message frame
header made up of a Break, followed by an auto-baud
Sync byte.
1.
2.
3.
4.
5.
15.5
1.
2.
3.
4.
5.
The act of reading the RXxREG character will move the
next character to the top of the receive FIFO, including
a new set of PERR and FERR values.
15.6
The UART has full implementation of the IrDA encoder
and decoder as part of the UART module. The built-in
IrDA encoder and decoder functionality is enabled
using the IREN bit U1MODE<12>. When enabled
(IREN = 1), the receive pin (U1RX) acts as the input
from the infrared receiver. The transmit pin (U1TX) acts
as the output to the infrared transmitter.
15.7
An alternate set of I/O pins, U1ATX and U1ARX can be
used for communications. The alternate UART pins are
useful when the primary UART pins are shared by other
peripherals. The alternate I/O pins are enabled by set-
ting the ALTIO bit in the UxMODE register. If ALTIO =
1, the U1ATX and U1ARX pins are used by the UART
module, instead of the U1TX and U1RX pins. If ALTIO
= 0, the U1TX and U1RX pins are used by the UART
module.
dsPIC30F1010/202X
Configure the UART for the desired mode.
Set UTXEN and UTXBRK – sets up the Break
character,
Load the TXxREG with a dummy character to
initiate transmission (value is ignored).
Write ‘55h’ to TXxREG – loads Sync character
into the transmit FIFO.
After the Break has been sent, the UTXBRK bit
is reset by hardware. The Sync character now
transmits.
Set up the UART (as described in Section 15.2
“Transmitting in 8-bit Data Mode”).
Enable the UART.
A receive interrupt will be generated when one
or more data characters have been received as
per interrupt control bit, URXISELx.
Read the OERR bit to determine if an overrun
error has occurred. The OERR bit must be reset
in software.
Read RXxREG.
Break and Sync Transmit
Sequence
Receiving in 8-bit or 9-bit Data
Mode
Built-in IrDA Encoder and Decoder
Alternate UART I/O Pins
DS70178C-page 163
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