DSPIC30F2020-30I/MMB32 Microchip Technology, DSPIC30F2020-30I/MMB32 Datasheet - Page 277
![IC DSPIC MCU/DSP 12K 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
DSPIC30F2020-30I/MMB32
Manufacturer Part Number
DSPIC30F2020-30I/MMB32
Description
IC DSPIC MCU/DSP 12K 28QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.AC164335.pdf
(286 pages)
2.DSPIC30F2011-20IP.pdf
(26 pages)
3.DSPIC30F1010-30ISO.pdf
(26 pages)
4.DSPIC30F1010-30ISO.pdf
(50 pages)
Specifications of DSPIC30F2020-30I/MMB32
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-QFN
For Use With
DM300023 - KIT DEMO DSPICDEM SMPS BUCK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
Q4035438A
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F2020-30I/MMB32
Manufacturer:
Microchip Technology
Quantity:
135
- AC164335 PDF datasheet
- DSPIC30F2011-20IP PDF datasheet #2
- DSPIC30F1010-30ISO PDF datasheet #3
- DSPIC30F1010-30ISO PDF datasheet #4
- Current page: 277 of 286
- Download datasheet (5Mb)
APPENDIX A:
Revision A (June 2006)
• Initial release of this document.
Revision B (August 2006)
This revision includes:
Updated
INTTREG register.
Updated device configuration registers to include FBS
Boot Code Segment and FOSCEL Oscillator Selection
configuration registers (see Section 18.10 “Device
Configuration Registers”).
Updated Electrical Characteristics:
• I
Typographical corrections:
• dsPIC30F1010/2020 Port Registers (see Table 6-1)
• dsPIC30F2023 Port Registers (see Table 6-2)
• dsPIC30F1010/202X CNEN1 SFR reset state
• PWMCONx (see Register 12-5)
• ALTDTRx (see Register 12-9)
• ADCPC1 (see Register 16-6)
© 2006 Microchip Technology Inc.
87 ma (see Table 21-6)
- TRISA SFR bit 9 corrected to “TRISA9”
- TRISD SFR Reset State corrected to
- TRISA SFR bit 0 corrected to “unused”
- PORTA SFR bit 0 corrected to “unused”
- LATA SFR bit 0 corrected to “unused”
- TRISD SFR bit 0 corrected to “TRISD0”
- PORTD SFR bit 0 corrected to “RD0”
- LATD SFR bit 0 corrected to “LATD0”
- TRISD SFR reset state corrected to
corrected to “0000 0000 0000 0000“
(see Table 6-3)
- Bit 13 description corrected to “TRGSTAT”
- Bit 10 description corrected to “TRGIEN”
- Bits 15-14 corrected to “unused”
- TRGSRC2<4:0> corrected to include bit 4
IDLE
“0000 0000 0000 0011”
“0000 0000 0000 0011”
Parameter DC43f Max Value revised to
Section 5.0
REVISION HISTORY
“Interrupts”
to
include
Preliminary
Revision C (November 2006)
This revision includes:
Updated RC, EC and HS Crystal operating frequencies
for Industrial and Extended Temperatures.
Revised SPI section to reflect updated operating fre-
quencies (see Section 13.0 “Serial Peripheral Inter-
face (SPI)”).
Revised oscillator configurations (see Section 18.3
“Oscillator Configurations”).
Updated Electrial Characteristics:
• Supply voltage parameter DC11 minimum value
• Operating current (I
• Idle current (I
• I/O Pin Input specifications (see Table 21-8)
• I/O Pin Output specifications (see Table 21-9)
• External Clock Timing (see Figure 21-2 and
• PLL Clock Timing (see Table 21-13)
• Internal RC Accuracy (see Table 21-15)
• Power-up Timer Period (see Table 21-18)
changed to 3.0V (see Table 21-4)
Table 21-12)
dsPIC30F1010/202X
IDLE
) (see Table 21-6)
DD
) (see Table 21-5)
DS70178C-page 275
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