ATMEGA644P-20PQ Atmel, ATMEGA644P-20PQ Datasheet - Page 18

MCU AVR 64K FLASH 20MHZ 40-PDIP

ATMEGA644P-20PQ

Manufacturer Part Number
ATMEGA644P-20PQ
Description
MCU AVR 64K FLASH 20MHZ 40-PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA644P-20PQ

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5. AVR Memories
5.1
5.2
8011O–AVR–07/10
Overview
In-System Reprogrammable Flash Program Memory
This section describes the different memories in the ATmega164P/324P/644P. The AVR archi-
tecture has two main memory spaces, the Data Memory and the Program Memory space. In
addition, the ATmega164P/324P/644P features an EEPROM Memory for data storage. All three
memory spaces are linear and regular.
The ATmega164P/324P/644P contains 16K/32K/64K bytes On-chip In-System Reprogramma-
ble Flash memory for program storage. Since all AVR instructions are 16 bits or 32 bits wide, the
Flash is organized as 32/64 x 16. For software security, the Flash Program memory space is
divided into two sections, Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega164P/324P/644P Program Counter (PC) is 15/16 bits wide, thus addressing the 32/64K
program memory locations. The operation of Boot Program section and associated Boot Lock
bits for software protection are described in detail in
”Memory Programming” on page 293
loading using the SPI pins or the JTAG interface.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description.
Timing diagrams for instruction fetch and execution are presented in
ing” on page
14.
contains a detailed description on Flash data serial down-
ATmega164P/324P/644P
”Memory Programming” on page
”Instruction Execution Tim-
293.
18

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