ATMEGA644P-20PQ Atmel, ATMEGA644P-20PQ Datasheet - Page 267

MCU AVR 64K FLASH 20MHZ 40-PDIP

ATMEGA644P-20PQ

Manufacturer Part Number
ATMEGA644P-20PQ
Description
MCU AVR 64K FLASH 20MHZ 40-PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA644P-20PQ

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
22.3
22.3.1
22.3.2
Version
Part Number
Manufacturer ID
22.3.3
8011O–AVR–07/10
Data Registers
Bypass Register
Device Identification Register
Reset Register
The Data Registers relevant for Boundary-scan operations are:
• Bypass Register
• Device Identification Register
• Reset Register
• Boundary-scan Chain
The Bypass Register consists of a single Shift Register stage. When the Bypass Register is
selected as path between TDI and TDO, the register is reset to 0 when leaving the Capture-DR
controller state. The Bypass Register can be used to shorten the scan chain on a system when
the other devices are to be tested.
Figure 22-1
Figure 22-1. The Format of the Device Identification Register
Version is a 4-bit number identifying the revision of the component. The JTAG version number
follows the revision of the device. Revision A is 0x0, revision B is 0x1 and so on.
The part number is a 16-bit code identifying the component. The JTAG Part Number for
ATmega164P/324P/644P is listed in
The Manufacturer ID is a 11-bit code identifying the manufacturer. The JTAG manufacturer ID
for ATMEL is listed in
The Reset Register is a test Data Register used to reset the part. Since the AVR tri-states Port
Pins when reset, the Reset Register can also replace the function of the unimplemented optional
JTAG instruction HIGHZ.
A high value in the Reset Register corresponds to pulling the external Reset low. The part is
reset as long as there is a high value present in the Reset Register. Depending on the fuse set-
tings for the clock options, the part will remain reset for a reset time-out period (refer to
Sources” on page
not latched, so the reset will take place immediately, as shown in
Bit
Device ID
shows the structure of the Device Identification Register.
MSB
31
Version
4 bits
30) after releasing the Reset Register. The output from this Data Register is
Table 24-6 on page
28
27
Table 24-6 on page
Part Number
16 bits
296.
ATmega164P/324P/644P
296.
12
11
Figure
Manufacturer ID
11 bits
22-2.
1
LSB
1-bit
”Clock
1
0
267

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