ATMEGA32HVB-8X3 Atmel, ATMEGA32HVB-8X3 Datasheet - Page 114

• Manufacturer Part Number: ATMEGA32HVB-8X3
• Description: MCU AVR 32KB FLASH 8MHZ 44TSSOP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA32HVB-8X3

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI
• Peripherals: POR, WDT
• Number Of I /o: 17
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 25 V
• Data Converters: A/D 7x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TSSOP
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, TWI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRSB200
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 7 Channel
• Package: 44TSSOP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 5|9|12|15|18|24 V
• For Use With: ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.7.4
19.7.5
8042B–AVR–06/10
CADICH and CADICL – CC-ADC Instantaneous Current
CADAC3, CADAC2, CADAC1 and CADAC0 – CC-ADC Accumulate Current
Table 19-3.
When a CC-ADC Instantaneous Current conversion is complete, the result is found in these two
registers. CADIC15:0 represents the converted result in 2's complement format. Bits 12:0 are
the 13-bit ADC result (including sign), while bit 15:13 are the sign extension bits.
When CADICL is read, the CC-ADC Instantaneous Current register is not updated until CADCH
is read. Reading the registers in the sequence CADICL, CADICH will ensure that consistent val-
ues are read. When a conversion is completed, both registers must be read before the next
conversion is completed, otherwise data will be lost.
The CADAC3, CADAC2, CADAC1 and CADAC0 Registers contain the Accumulate Current
measurements in 2’s complement format. Bits 17:0 are the 18-bit ADC result (including sign),
while bit 31:18 are the sign extension bits.
When CADAC0 is read, the CC-ADC Accumulate Current register is not updated until CADAC3
is read. Reading the registers in the sequence CADAC0, CADAC1, CADAC2, CADAC3 will
ensure that consistent values are read. When a conversion is completed, all four registers must
be read before the next conversion is completed, otherwise data will be lost.
Bit
(0xE5)
(0xE4)
Bit
Read/Write
Initial Value
Bit
(0xE3)
(0xE2)
(0xE1)
(0xE0)
Read/Write
Initial Value
CADVSE
0
1
Input Voltage Range and the conversion value step-size for the CADVSE
settings.
15
R
R
31
23
15
7
0
0
R
R
R
7
0
0
0
Voltage Range
± 200 mV
± 100 mV
14
R
R
30
22
14
6
0
0
R
R
R
6
0
0
0
13
29
21
13
R
R
5
0
0
R
R
R
5
0
0
0
12
28
20
12
CADAC[31:24]
CADAC[23:16]
R
R
4
0
0
R
R
R
4
CADAC[15:8]
0
0
0
CADIC[15:8]
CADAC[7:0]
CADIC[7:0]
Step-size CADAC
1.67 µV
0.84 µV
ATmega16HVB/32HVB
11
27
19
11
R
R
R
R
R
3
0
0
3
0
0
0
10
26
18
10
R
R
2
0
0
R
R
R
2
0
0
0
25
17
R
R
9
1
0
0
R
R
R
9
1
0
0
0
Step-size CADIC
53.7 µV
26.9 µV
24
16
R
R
R
R
R
8
0
0
0
8
0
0
0
0
CADAC3
CADAC2
CADAC1
CADAC0
CADICH
CADICL
114