ATMEGA32HVB-8X3 Atmel, ATMEGA32HVB-8X3 Datasheet - Page 119
ATMEGA32HVB-8X3
Manufacturer Part Number
ATMEGA32HVB-8X3
Description
MCU AVR 32KB FLASH 8MHZ 44TSSOP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32HVB-8X3
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI
Peripherals
POR, WDT
Number Of I /o
17
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 25 V
Data Converters
A/D 7x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TSSOP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, TWI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
17
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRSB200
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 7 Channel
Package
44TSSOP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
5|9|12|15|18|24 V
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA32HVB-8X3
Manufacturer:
Atmel
Quantity:
408
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20.3.2
8042B–AVR–06/10
Cell inputs
The V-ADC features one input channel for each battery cell to be able to measure each cell indi-
vidually and to measure the total battery voltage through the input pins NV, PV1, PV2, PV3 and
PV4. Note that the internal Cell Balancing uses the same pins to bypass balancing current
”Cell Balancing” on page
the V-ADC should not do conversion on the selected channel, as the internal Cell balancing will
affect the conversion result.
The V-ADC is designed to operate on PV1 pin voltages above 2V. If the battery cell voltage on
PV1 input falls below 2V the upper cell voltage appears to be lower than the its actual value. To
avoid that cells get potentially overcharged software should keep the cells in balance using the
internal Cell Balancing.
When not using all the cell inputs, the unused cells should be connected to the cell below. An
example external coupling in 3-cell mode is shown in
the input is not used, it is recommended to connect the input through an external resistance to
limit inverse coupling current. This is to be able to protect the battery if cells are reversed cou-
pled during production.
Figure 20-3. 1 3-cell mode connection
R
R
R
R
R
See ”Cell Balancing” on page 154.
154.) for details for balancing the battery cells. When balancing a cell
C
C
C
PV4
PV3
PV2
PV1
NV
ATmega16HVB/32HVB
ATmega16HVB/32HVB
Figure 20-3 on page
for details.
119. Note that even if
(See
119
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