ATMEGA162V-8PU Atmel, ATMEGA162V-8PU Datasheet - Page 137

IC AVR MCU 16K 8MHZ 1.8V 40DIP

ATMEGA162V-8PU

Manufacturer Part Number
ATMEGA162V-8PU
Description
IC AVR MCU 16K 8MHZ 1.8V 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA162V-8PU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
JTAG/SPI/USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Package
40PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA162V-8PU
Manufacturer:
IDT
Quantity:
74
Extended
Timer/Counter
Interrupt Flag Register
– ETIFR
2513K–AVR–07/09
(1)
Note:
• Bit 5 – ICF3: Timer/Counter3, Input Capture Flag
This flag is set when a capture event occurs on the ICP3 pin. When the Input Capture Register
(ICR3) is set by the WGMn3:0 to be used as the TOP value, the ICF3 Flag is set when the coun-
ter reaches the TOP value.
ICF3 is automatically cleared when the Input Capture Interrupt Vector is executed. Alternatively,
ICF3 can be cleared by writing a logic one to its bit location.
• Bit 4 – OCF3A: Timer/Counter3, Output Compare A Match Flag
This flag is set in the timer clock cycle after the counter (TCNT3) value matches the Output
Compare Register A (OCR3A).
Note that a Forced Output Compare (FOC3A) strobe will not set the OCF3A Flag.
OCF3A is automatically cleared when the Output Compare Match A Interrupt Vector is exe-
cuted. Alternatively, OCF3A can be cleared by writing a logic one to its bit location.
• Bit 3 – OCF3B: Timer/Counter3, Output Compare B Match Flag
This flag is set in the timer clock cycle after the counter (TCNT3) value matches the Output
Compare Register B (OCR3B).
Note that a Forced Output Compare (FOC3B) strobe will not set the OCF3B Flag.
OCF3B is automatically cleared when the Output Compare Match B Interrupt Vector is exe-
cuted. Alternatively, OCF3B can be cleared by writing a logic one to its bit location.
• Bit 2 – TOV3: Timer/Counter3, Overflow Flag
The setting of this flag is dependent of the WGMn3:0 bits setting. In normal and CTC modes, the
TOV3 Flag is set when the timer overflows. Refer to
behavior when using another WGMn3:0 bit setting.
TOV3 is automatically cleared when the Timer/Counter3 Overflow Interrupt Vector is executed.
Alternatively, TOV3 can be cleared by writing a logic one to its bit location.
Bit
Read/Write
Initial Value
1. This register contains flag bits for several Timer/Counters, but only Timer3 bits are described
in this section. The remaining bits are described in their respective Timer sections.
R
7
0
R
6
0
ICF3
R/W
5
0
OCF3A
R/W
4
0
OC3FB
R/W
3
0
Table 56 on page 130
TOV3
R/W
2
0
R
1
0
ATmega162/V
R
0
0
for the TOV3 Flag
ETIFR
137

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