ATMEGA325V-8AU Atmel, ATMEGA325V-8AU Datasheet - Page 53

• Manufacturer Part Number: ATMEGA325V-8AU
• Description: IC AVR MCU 32K 8MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA325V-8AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.2
11.3
11.3.1
2570M–AVR–04/11
Moving Interrupts Between Application and Boot Space
Register Description
MCUCR – MCU Control Register
When the BOOTRST Fuse is programmed, the Boot section size set to 4K bytes and the IVSEL
bit in the MCUCR Register is set before any interrupts are enabled, the most typical and general
program setup for the Reset and Interrupt Vector Addresses is:
The MCU Control Register controls the placement of the Interrupt Vector table.
• Bit 1 – IVSEL: Interrupt Vector Select
When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the Flash
memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning of the Boot
Loader section of the Flash. The actual address of the start of the Boot Flash Section is deter-
mined by the BOOTSZ Fuses. Refer to the section
Self-Programming” on page 251
tables, a special write procedure must be followed to change the IVSEL bit:
Interrupts will automatically be disabled while this sequence is executed. Interrupts are disabled
in the cycle IVCE is set, and they remain disabled until after the instruction following the write to
IVSEL. If IVSEL is not written, interrupts remain disabled for four cycles. The I-bit in the Status
Register is unaffected by the automatic disabling.
Note:
Bit
0x35 (0x55)
Read/Write
Initial Value
Address Labels Code
;
.org 0x3800/0x7800
0x3800/0x7800
0x3802/0x7802
0x3804/0x7804
...
0x382C/0x782C
;
0x382E/0x782ERESET:ldir16,high(RAMEND); Main program start
0x382F/0x782F
0x3830/0x7830
0x3831/0x7831
0x3832/0x7832
0x3833/0x7833
1. Write the Interrupt Vector Change Enable (IVCE) bit to one.
2. Within four cycles, write the desired value to IVSEL while writing a zero to IVCE.
If Interrupt Vectors are placed in the Boot Loader section and Boot Lock bit BLB02 is programmed,
interrupts are disabled while executing from the Application section. If Interrupt Vectors are placed
R/W
JTD
7
0
jmp
jmp
jmp
...
jmp
out
ldi
out
sei
<instr>
R
6
–
0
RESET
EXT_INT0
PCINT0
...
SPM_RDY
SPH,r16
r16,low(RAMEND)
SPL,r16
R
5
–
0
xxx
for details. To avoid unintentional changes of Interrupt Vector
PUD
R/W
4
0
; Store Program Memory Ready Handler
ATmega325/3250/645/6450
; Set Stack Pointer to top of RAM
Comments
; Reset handler
; IRQ0 Handler
; PCINT0 Handler
;
; Enable interrupts
R
3
–
0
“Boot Loader Support – Read-While-Write
R
2
–
0
IVSEL
R/W
1
0
IVCE
R/W
0
0
MCUCR
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