ATMEGA325V-8AU Atmel, ATMEGA325V-8AU Datasheet - Page 85

IC AVR MCU 32K 8MHZ 64TQFP

ATMEGA325V-8AU

Manufacturer Part Number
ATMEGA325V-8AU
Description
IC AVR MCU 32K 8MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA325V-8AU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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14. 8-bit Timer/Counter0 with PWM
14.1
14.2
14.2.1
2570M–AVR–04/11
Features
Overview
Definitions
Timer/Counter0 is a general purpose, single compare unit, 8-bit Timer/Counter module. The
main features are:
A simplified block diagram of the 8-bit Timer/Counter is shown in
placement of I/O pins, refer to
ATmega325/645” on page
shown in bold. The device-specific I/O Register and bit locations are listed in the
Description” on page
Figure 14-1. 8-bit Timer/Counter Block Diagram
Many register and bit references in this section are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 0. A lower case “x” replaces the Output Com-
pare unit number, in this case unit A. However, when using the register or bit defines in a
program, the precise form must be used, i.e., TCNT0 for accessing Timer/Counter0 counter
value and so on.
Single Compare Unit Counter
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Frequency Generator
External Event Counter
10-bit Clock Prescaler
Overflow and Compare Match Interrupt Sources (TOV0 and OCF0A)
Timer/Counter
TCNTn
OCRn
=
96.
3. CPU accessible I/O Registers, including I/O bits and I/O pins, are
direction
count
clear
BOTTOM
= 0
“Pinout ATmega3250/6450” on page 2
Control Logic
=
TCCRn
TOP
0xFF
ATmega325/3250/645/6450
clk
Tn
Generation
Waveform
Clock Select
( From Prescaler )
Detector
Edge
Figure
14-1. For the actual
and
OCn
(Int.Req.)
TOVn
(Int.Req.)
OCn
Tn
“Register
“Pinout
85

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