AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 212
AT32UC3A364-ALUT
Manufacturer Part Number
AT32UC3A364-ALUT
Description
IC MCU 64KB FLASH 144LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3A364-ALUT
Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, WDT
Number Of I /o
110
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
IrDA/SCI/SCIF/UDI
Maximum Clock Frequency
66 MHz
Number Of Timers
3
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
Minimum Operating Temperature
- 40 C
Controller Family/series
AT32UC3A
No. Of I/o's
110
Ram Memory Size
64KB
Cpu Speed
66MHz
No. Of Timers
2
Rohs Compliant
Yes
For Use With
ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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15.7.2
Register Name:
Access Type:
Offset:
Reset Value:
• NCSRDPULSE: NCS Pulse Length in READ Access
• NRDPULSE: NRD Pulse Length
• NCSWRPULSE: NCS Pulse Length in WRITE Access
• NWEPULSE: NWE Pulse Length
32072C–AVR32–2010/03
31
23
15
–
–
–
7
–
In standard read access, the NCS signal pulse length is defined as:
The NCS pulse length must be at least one clock cycle.
In page mode read access, the NCSRDPULSE field defines the duration of the first access to one page.
In standard read access, the NRD signal pulse length is defined in clock cycles as:
The NRD pulse length must be at least one clock cycle.
In page mode read access, the NRDPULSE field defines the duration of the subsequent accesses in the page.
In write access, the NCS signal pulse length is defined as:
The NCS pulse length must be at least one clock cycle.
The NWE signal pulse length is defined as:
The NWE pulse length must be at least one clock cycle.
Pulse Register
NCS Pulse Length in write access
NCS Pulse Length in read access
30
22
14
6
PULSE
Read/Write
0x04 + CS_number*0x10
0x01010101
NWE Pulse Length
NRD Pulse Length
29
21
13
5
=
=
(
(
256 NWEPULSE 6 [ ]
256
=
=
(
(
×
×
256 NCSWRPULSE 6 [ ]
256 NCSRDPULSE 6 [ ]
28
20
12
4
NRDPULSE 6 [ ]
×
×
NCSWRPULSE
NCSRDPULSE
NWEPULSE
NRDPULSE
27
19
11
+
+
3
NRDPULSE 5:0
NWEPULSE 5:0
+
+
NCSRDPULSE 5:0
NCSWRPULSE 5:0
[
[
26
18
10
2
]
]
) clock cycles
) clock cycles
[
[
]
AT32UC3A3/A4
]
) clock cycles
) clock cycles
25
17
9
1
24
16
8
0
Page
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