AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 861
AT32UC3A364-ALUT
Manufacturer Part Number
AT32UC3A364-ALUT
Description
IC MCU 64KB FLASH 144LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3A364-ALUT
Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, WDT
Number Of I /o
110
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
IrDA/SCI/SCIF/UDI
Maximum Clock Frequency
66 MHz
Number Of Timers
3
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
Minimum Operating Temperature
- 40 C
Controller Family/series
AT32UC3A
No. Of I/o's
110
Ram Memory Size
64KB
Cpu Speed
66MHz
No. Of Timers
2
Rohs Compliant
Yes
For Use With
ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 861 of 1014
- Download datasheet (16Mb)
• CSTOE: Completion Signal Time-out Error
• DTOE: Data Time-out Error
• DCRCE: Data CRC Error
• RTOE: Response Time-out Error
• RENDE: Response End Bit Error
• RCRCE: Response CRC Error
• RDIRE: Response Direction Error
• RINDE: Response Index Error
• TXBUFE: TX Buffer Empty Status
• RXBUFF: RX BUffer Full Status
• CSRCV: CE-ATA Completion Signal Received
• SDIOWAIT: SDIO Read Wait Operation Status
• SDIOIRQB: SDIO Interrupt for Slot B
• SDIOIRQA: SDIO Interrupt for Slot A
• ENDTX: End of RX Buffer
• ENDRX: End of RX Buffer
• NOTBUSY: MCI Not Busy
32072C–AVR32–2010/03
This bit is set when the completion signal time-out defined by the CSTOR.CSTOCYC field and the CSTOR.CSTOMUL field is
reached.
This bit is cleared when reading the SR register.
This bit is set when the data time-out defined by the DTOR.DTOCYC field and the DTOR.DTOMUL field is reached.
This bit is cleared when reading the SR register.
This bit is set when a CRC16 error is detected in the last data block.
This bit is cleared when reading the SR register.
This bit is set when the response time-out defined by the CMDR.MAXLAT bit is reached.
This bit is cleared when writing the CMDR register.
This bit is set when the end bit of the response is not detected.
This bit is cleared when writing the CMDR register.
This bit is set when a CRC7 error is detected in the response.
This bit is cleared when writing the CMDR register.
This bit is set when the direction bit from card to host in the response is not detected.
This bit is cleared when writing the CMDR register.
This bit is set when a mismatch is detected between the command index sent and the response index received.
This bit is cleared when writing the CMDR register.
This bit is set when the DMA Tx Buffer is empty.
This bit is cleared when the DMA Tx Buffer is not empty.
This bit is set when the DMA Rx Buffer is full.
This bit is cleared when the DMA Rx Buffer is not full.
This bit is set when the device issues a command completion signal on the command line.
This bit is cleared when reading the SR register.
This bit is set when the data bus has entered IO wait state.
This bit is cleared when normal bus operation.
This bit is cleared when reading the SR register.
This bit is set when a SDIO interrupt on Slot B occurs.
This bit is set when a SDIO interrupt on Slot A occurs.
This bit is cleared when reading the SR register.
This bit is set when the DMA Controller transmission is finished.
This bit is cleared when the DMA Controller transmission is not finished.
This bit is set when the DMA Controller reception is finished.
This bit is cleared when the DMA Controller reception is not finished.
This bit must be used only for write operations.
AT32UC3A3/A4
861
Related parts for AT32UC3A364-ALUT
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
KIT DEV/EVAL FOR AT32UC3A3
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
DEV KIT FOR AVR/AVR32
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
INTERVAL AND WIPE/WASH WIPER CONTROL IC WITH DELAY
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Low-Voltage Voice-Switched IC for Hands-Free Operation
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
MONOLITHIC INTEGRATED FEATUREPHONE CIRCUIT
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
AM-FM Receiver IC U4255BM-M
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Monolithic Integrated Feature Phone Circuit
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Multistandard Video-IF and Quasi Parallel Sound Processing
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
High-performance EE PLD
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
8-bit Flash Microcontroller
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
2-Wire Serial EEPROM
Manufacturer:
ATMEL Corporation
Datasheet: