AT32UC3A3128-ALUT Atmel, AT32UC3A3128-ALUT Datasheet - Page 42
![IC MCU 128KB FLASH 144LQFP](/photos/6/72/67244/144l1-lqfp_sml.jpg)
AT32UC3A3128-ALUT
Manufacturer Part Number
AT32UC3A3128-ALUT
Description
IC MCU 128KB FLASH 144LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3A3128-ALUT
Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, WDT
Number Of I /o
110
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
IrDA/SCI/SCIF/UDI
Maximum Clock Frequency
66 MHz
Number Of Timers
3
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
Minimum Operating Temperature
- 40 C
Controller Family/series
AT32UC3A
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
66MHz
No. Of Timers
1
Rohs Compliant
Yes
For Use With
ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A3128-ALUT
Manufacturer:
Atmel
Quantity:
135
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7.4
7.4.1
7.4.2
7.5
7.5.1
7.5.2
32072C–AVR32–2010/03
Product Dependencies
Functional Description
I/O Lines
Interrupt
Slow Clock
Oscillator 0 and 1 Operation
The PM provides a number of generic clock outputs, which can be connected to output pins,
multiplexed with I/O lines. The programmer must first program the I/O controller to assign these
pins to their peripheral function. If the I/O pins of the PM are not used by the application, they
can be used for other purposes by the I/O controller.
The PM interrupt line is connected to one of the internal sources of the interrupt controller. Using
the PM interrupt requires the interrupt controller to be programmed first.
The slow clock is generated from an internal RC oscillator which is always running, except in
Static mode. The slow clock can be used for the main clock in the device, as described in
tion
the Power Manager.
The RC oscillator has a 3 cycles startup time, and is always available when the CPU is running.
The RC oscillator operates at approximately 115 kHz. Software can change RC oscillator cali-
bration through the use of the RCCR register. Please see the Electrical Characteristics section
for details.
RC oscillator can also be used as the RTC clock when crystal accuracy is not required.
The two main oscillators are designed to be used with an external crystal and two biasing capac-
itors, as shown in
device, as described in
clocks, as described in
The oscillators are disabled by default after reset. When the oscillators are disabled, the XIN and
XOUT pins can be used as general purpose I/Os. When the oscillators are configured to use an
external clock, the clock must be applied to the XIN pin while the XOUT pin can be used as a
general purpose I/O.
The oscillators can be enabled by writing to the OSCnEN bits in MCCTRL. Operation mode
(external clock or crystal) is chosen by writing to the MODE field in OSCCTRLn. Oscillators are
automatically switched off in certain sleep modes to reduce power consumption, as described in
Section
After a hard reset, or when waking up from a sleep mode that disabled the oscillators, the oscil-
lators may need a certain amount of time to stabilize on the correct frequency. This start-up time
can be set in the OSCCTRLn register.
The PM masks the oscillator outputs during the start-up time, to ensure that no unstable clocks
propagate to the digital logic. The OSCnRDY bits in POSCSR are automatically set and cleared
according to the status of the oscillators. A zero to one transition on these bits can also be con-
figured to generate an interrupt, as described in
7.5.5. The slow clock is also used for the Watchdog Timer and measuring various delays in
7.5.7.
Figure 7-2 on page
Section
Section
7.5.8.
7.5.5. Both oscillators can be used as source for the generic
43. Oscillator 0 can be used for the main clock in the
Section
7.6.7.
AT32UC3A3/A4
Sec-
42
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