AT32UC3A3128-ALUT Atmel, AT32UC3A3128-ALUT Datasheet - Page 712
![IC MCU 128KB FLASH 144LQFP](/photos/6/72/67244/144l1-lqfp_sml.jpg)
AT32UC3A3128-ALUT
Manufacturer Part Number
AT32UC3A3128-ALUT
Description
IC MCU 128KB FLASH 144LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3A3128-ALUT
Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, WDT
Number Of I /o
110
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
IrDA/SCI/SCIF/UDI
Maximum Clock Frequency
66 MHz
Number Of Timers
3
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
Minimum Operating Temperature
- 40 C
Controller Family/series
AT32UC3A
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
66MHz
No. Of Timers
1
Rohs Compliant
Yes
For Use With
ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A3128-ALUT
Manufacturer:
Atmel
Quantity:
135
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26.8.2.14
Register Name:
Access Type:
Offset:
Reset Value:
• STALLRQ: STALL Request
• RSTDT: Reset Data Toggle
• NYETDIS: NYET token disable
• EPDISHDMA: Endpoint Interrupts Disable HDMA Request Enable
32072C–AVR32–2010/03
PACKETE
SHORT
31
23
15
7
-
-
-
This bit is set when the STALLRQS bit is written to one. This will request to send a STALL handshake to the host.
This bit is cleared when a new SETUP packet is received or when the STALLRQC bit is written to zero.
This bit is set when the RSTDTS bit is written to one. This will clear the data toggle sequence, i.e., set to Data0 the data toggle
sequence of the next sent (IN endpoints) or received (OUT endpoints) packet.
This bit is cleared instantaneously.
The user does not have to wait for this bit to be cleared.
This bit is set when the NYETDISS bit is written to one. This will send a ACK handshake instead of a NYET handshake in high-
speed mode.
This bit is cleared when the NYETDISC bit is written to one.This will let the USBB handling the high-speed handshake following
the usb 2.0 standard.
This bit is set when the EPDISHDMAS is written to one. This will pause the on-going DMA channel n transfer on any Endpoint n
interrupt (EPnINT), whatever the state of the Endpoint n Interrupt Enable bit (EPnINTE).
The user then has to acknowledge or to disable the interrupt source (e.g. RXOUTI) or to clear the EPDISHDMA bit (by writing a
one to the EPDISHDMAC bit) in order to complete the DMA transfer.
In ping-pong mode, if the interrupt is associated to a new system-bank packet (e.g. Bank1) and the current DMA transfer is
running on the previous packet (Bank0), then the previous-packet DMA transfer completes normally, but the new-packet DMA
transfer will not start (not requested).
If the interrupt is not associated to a new system-bank packet (NAKINI, NAKOUTI, etc.), then the request cancellation may
occur at any time and may immediately pause the current DMA transfer.
This may be used for example to identify erroneous packets, to prevent them from being transferred into a buffer, to complete a
DMA transfer by software after reception of a short packet, etc.
Endpoint n Control Register
STALLEDE/
CRCERRE
FIFOCON
30
22
14
6
-
-
UECONn, n in [0..7]
Read-Only
0x01C0 + (n * 0x04)
0x00000000
OVERFE
KILLBK
29
21
13
5
-
-
NBUSYBKE
HBISOFLUSHE
NAKINE/
28
20
12
4
-
-
HBISOINERRE
NAKOUTE/
STALLRQ
27
19
11
3
-
-
ERRORTRANSE
UNDERFE
RXSTPE/
RSTDT
26
18
10
2
-
AT32UC3A3/A4
NYETDIS
RXOUTE
DATAXE
25
17
9
1
-
EPDISHDMA
MDATAE
TXINE
24
16
8
0
-
712
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