AT89C51RD2-SLSUM Atmel, AT89C51RD2-SLSUM Datasheet - Page 14

IC 8051 MCU FLASH 64K 44PLCC

AT89C51RD2-SLSUM

Manufacturer Part Number
AT89C51RD2-SLSUM
Description
IC 8051 MCU FLASH 64K 44PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51RD2-SLSUM

Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
UART, SPI
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Package
44PLCC
Device Core
80C51
Family Name
89C
Maximum Speed
40 MHz
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-11 - KIT STARTER FOR AT89C51RX2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

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5. Port Types
Figure 5-1.
14
AT89C51RD2/ED2
Port Latch
Data
Quasi-Bidirectional Output
AT89C51RD2/ED2 I/O ports (P1, P2, P3, P4, P5) implement the quasi-bidirectional output that
is common on the 80C51 and most of its derivatives. This output type can be used as both an
input and output without the need to reconfigure the port. This is possible because when the port
outputs a logic high, it is weakly driven, allowing an external device to pull the pin low. When the
pin is pulled low, it is driven strongly and able to sink a fairly large current. These features are
somewhat similar to an open drain output except that there are three pull-up transistors in the
quasi-bidirectional output that serve different purposes. One of these pull-ups, called the "weak"
pull-up, is turned on whenever the port latch for the pin contains a logic 1. The weak pull-up
sources a very small current that will pull the pin high if it is left floating. A second pull-up, called
the "medium" pull-up, is turned on when the port latch for the pin contains a logic 1 and the pin
itself is also at a logic 1 level. This pull-up provides the primary source current for a quasi-bidi-
rectional pin that is outputting a 1. If a pin that has a logic 1 on it is pulled low by an external
device, the medium pull-up turns off, and only the weak pull-up remains on. In order to pull the
pin low under these conditions, the external device has to sink enough current to overpower the
medium pull-up and take the voltage on the port pin below its input threshold.
The third pull-up is referred to as the "strong" pull-up. This pull-up is used to speed up low-to-
high transitions on a quasi-bidirectional port pin when the port latch changes from a logic 0 to a
logic 1. When this occurs, the strong pull-up turns on for a brief time, two CPU clocks, in order to
pull the port pin high quickly. Then it turns off again.
The DPU bit (bit 7 in AUXR register) allows to disable the permanent weak pull up of all ports
when latch data is logical 0.
The quasi-bidirectional port configuration is shown in Figure 5-1.
2 CPU
Clock Delay
Input
Data
P
N
Strong
AUXR.7
DPU
P
Weak
P
Medium
Pin
4235K–8051–05/08

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