AT89C51RD2-SLSUM Atmel, AT89C51RD2-SLSUM Datasheet - Page 37

IC 8051 MCU FLASH 64K 44PLCC

AT89C51RD2-SLSUM

Manufacturer Part Number
AT89C51RD2-SLSUM
Description
IC 8051 MCU FLASH 64K 44PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51RD2-SLSUM

Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
UART, SPI
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Package
44PLCC
Device Core
80C51
Family Name
89C
Maximum Speed
40 MHz
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-11 - KIT STARTER FOR AT89C51RX2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

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4235K–8051–05/08
Table 13-1.
CMOD - PCA Counter Mode Register (D9h)
Reset Value = 00XX X000b
Not bit addressable
The CCON register contains the run control bit for the PCA and the flags for the PCA timer (CF)
and each module (Refer to Table 13-2).
• Bit CR (CCON.6) must be set by software to run the PCA. The PCA is shut off by clearing this
• Bit CF: The CF bit (CCON.7) is set when the PCA counter overflows and an interrupt will be
• Bits 0 through 4 are the flags for the modules (bit 0 for module 0, bit 1 for module 1, etc.) and
Number
bit.
generated if the ECF bit in the CMOD register is set. The CF bit can only be cleared by
software.
are set by hardware when either a match or a capture occurs. These flags also can only be
cleared by software.
CIDL
Bit
7
7
6
5
4
3
2
1
0
Mnemonic
CMOD Register
WDTE
WDTE
CPS1
CPS0
CIDL
ECF
Bit
6
-
-
-
Description
Counter Idle Control
Cleared to program the PCA Counter to continue functioning during idle Mode.
Set to program PCA to be gated off during idle.
Watchdog Timer Enable
Cleared to disable Watchdog Timer function on PCA Module 4.
Set to enable Watchdog Timer function on PCA Module 4.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
PCA Count Pulse Select
CPS1CPS0
0
0
1
1
PCA Enable Counter Overflow Interrupt
Cleared to disable CF bit in CCON to inhibit an interrupt.
Set to enable CF bit in CCON to generate an interrupt.
5
-
0
1
0
1
Selected PCA input
Internal clock F
Internal clock F
Timer 0 Overflow
External clock at ECI/P1.2 pin (max rate = F
4
-
CLK PERIPH
CLK PERIPH
3
-
/6
/2
AT89C51RD2/ED2
CPS1
2
CLK PERIPH
CPS0
1
/4)
ECF
0
37

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