AT32UC3A0512-ALUT Atmel, AT32UC3A0512-ALUT Datasheet - Page 654
![IC MCU AVR32 512KB FLASH 144LQFP](/photos/6/72/67244/144l1-lqfp_sml.jpg)
AT32UC3A0512-ALUT
Manufacturer Part Number
AT32UC3A0512-ALUT
Description
IC MCU AVR32 512KB FLASH 144LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3A0512-ALUT
Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
109
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Package
144LQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
66 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
69
Interface Type
Ethernet/I2S/JTAG/SPI/TWI/USART
Number Of Timers
3
Processor Series
AT32UC3x
Core
AVR32
Data Ram Size
64 KB
Maximum Clock Frequency
66 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1100, ATEVK1105, ATAVRRZ600
Minimum Operating Temperature
- 40 C
For Use With
ATEVK1105 - KIT EVAL FOR AT32UC3A0ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A0512-ALUT
Manufacturer:
ATMEL
Quantity:
2 155
Part Number:
AT32UC3A0512-ALUT
Manufacturer:
AT
Quantity:
20 000
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31.7
32058J–AVR32–04/11
Timer Counter (TC) User Interface
Table 31-3.
BCR (Block Control Register) and BMR (Block Mode Register) control the whole TC block. TC
channels are controlled by the registers listed in
registers in
Table 31-4
Table 31-4.
Notes:
Offset
Offset
0xC0
0xC4
0x00
0x40
0x80
0x0C
0x1C
0x2C
0x00
0x04
0x08
0x10
0x14
0x18
0x20
0x24
0x28
1. Read-only if WAVE = 0
.
Channel/Register
TC Channel 0
TC Channel 1
TC Channel 2
TC Block Control Register
TC Block Mode Register
Channel Control Register
Register
Channel Mode Register
Reserved
Reserved
Counter Value
Register A
Register B
Register C
Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Table 31-4
TC Global Memory Map
TC Channel Memory Map
is in relation to the offset of the corresponding channel as mentioned in
Name
CMR
CCR
IMR
IDR
Name
IER
RC
CV
RA
RB
SR
BMR
BCR
Table 31-4
. The offset of each of the channel
See
See
See
Read/Write
Read/Write
Read/Write
Read/Write
Read-only
Write-only
Read-only
Read-only
Write-only
Write-only
Read/Write
Write-only
Access
Access
Table 31-4
Table 31-4
Table 31-4
(1)
(1)
AT32UC3A
Reset Value
Reset Value
–
0
–
–
0
0
0
0
0
–
–
0
–
0
654
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