AT32UC3A0512-ALUT Atmel, AT32UC3A0512-ALUT Datasheet - Page 658
![IC MCU AVR32 512KB FLASH 144LQFP](/photos/6/72/67244/144l1-lqfp_sml.jpg)
AT32UC3A0512-ALUT
Manufacturer Part Number
AT32UC3A0512-ALUT
Description
IC MCU AVR32 512KB FLASH 144LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3A0512-ALUT
Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
109
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Package
144LQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
66 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
69
Interface Type
Ethernet/I2S/JTAG/SPI/TWI/USART
Number Of Timers
3
Processor Series
AT32UC3x
Core
AVR32
Data Ram Size
64 KB
Maximum Clock Frequency
66 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1100, ATEVK1105, ATAVRRZ600
Minimum Operating Temperature
- 40 C
For Use With
ATEVK1105 - KIT EVAL FOR AT32UC3A0ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A0512-ALUT
Manufacturer:
ATMEL
Quantity:
2 155
Part Number:
AT32UC3A0512-ALUT
Manufacturer:
AT
Quantity:
20 000
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31.7.4
Register Name:
Access Type:
• TCCLKS: Clock Selection
• CLKI: Clock Invert
0 = Counter is incremented on rising edge of the clock.
1 = Counter is incremented on falling edge of the clock.
• BURST: Burst Signal Selection
• LDBSTOP: Counter Clock Stopped with RB Loading
0 = Counter clock is not stopped when RB loading occurs.
1 = Counter clock is stopped when RB loading occurs.
• LDBDIS: Counter Clock Disable with RB Loading
32058J–AVR32–04/11
WAVE = 0
LDBDIS
31
23
15
–
–
7
0
0
0
0
1
1
1
1
0
0
1
1
TC Channel Mode Register: Capture Mode
BURST
LDBSTOP
CPCTRG
TCCLKS
30
22
14
–
–
6
0
0
1
1
0
0
1
1
0
1
0
1
The clock is not gated by an external signal.
XC0 is ANDed with the selected clock.
XC1 is ANDed with the selected clock.
XC2 is ANDed with the selected clock.
29
21
13
–
–
–
5
CMR
Read/Write
0
1
0
1
0
1
0
1
BURST
Clock Selected
TIMER_CLOCK1
TIMER_CLOCK2
TIMER_CLOCK3
TIMER_CLOCK4
TIMER_CLOCK5
XC0
XC1
XC2
28
20
12
–
–
–
4
CLKI
27
19
11
–
–
3
LDRB
ABETRG
26
18
10
–
2
TCCLKS
25
17
–
9
1
AT32UC3A
ETRGEDG
LDRA
24
16
–
8
0
658
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