LPC2290FBD144/01,5 NXP Semiconductors, LPC2290FBD144/01,5 Datasheet - Page 16

• Manufacturer Part Number: LPC2290FBD144/01,5
• Description: IC ARM7 MCU RAM 16K 144-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2200r

Specifications of LPC2290FBD144/01,5

• Package / Case: 144-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 60MHz
• Connectivity: CAN, EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: PWM, WDT
• Number Of I /o: 76
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC22
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 64 KB
• Interface Type: CAN/I2C/SPI/UART
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 76
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Package: 144LQFP
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: OM10091 - KIT DEV PHYCORE-ARM7/LPC2220568-1757 - BOARD EVAL FOR LPC220X ARM MCU
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4013; 935282079551; LPC2290FBD144/01-S

NXP Semiconductors
LPC2290_3
Product data sheet
6.4.1 Interrupt sources
Vectored IRQs have the middle priority. Sixteen of the interrupt requests can be assigned
to this category. Any of the interrupt requests can be assigned to any of the 16 vectored
IRQ slots, among which slot 0 has the highest priority and slot 15 has the lowest.
Non-vectored IRQs have the lowest priority.
The VIC combines the requests from all the vectored and non-vectored IRQs to produce
the IRQ signal to the ARM processor. The IRQ service routine can start by reading a
register from the VIC and jumping there. If any of the vectored IRQs are requesting, the
VIC provides the address of the highest-priority requesting IRQs service routine,
otherwise it provides the address of a default routine that is shared by all the non-vectored
IRQs. The default routine can read another VIC register to see what IRQs are active.
Table 4
one interrupt line connected to the VIC, but may have several internal interrupt flags.
Individual interrupt flags may also represent more than one interrupt source.
Table 4.
Block
WDT
-
ARM Core
ARM Core
Timer 0
Timer 1
UART0
UART1
PWM0
I
SPI0
2
C-bus
lists the interrupt sources for each peripheral function. Each peripheral device has
Interrupt sources
Flag(s)
Watchdog Interrupt (WDINT)
Reserved for software interrupts only
EmbeddedICE, DbgCommRx
EmbeddedICE, DbgCommTx
Match 0 to 3 (MR0, MR1, MR2, MR3)
Capture 0 to 3 (CR0, CR1, CR2, CR3)
Match 0 to 3 (MR0, MR1, MR2, MR3)
Capture 0 to 3 (CR0, CR1, CR2, CR3)
RX Line Status (RLS)
Transmit Holding Register Empty (THRE)
RX Data Available (RDA)
Character Time-out Indicator (CTI)
Auto-Baud Time-Out (ABTO) (available in LPC2290/01 only)
End of Auto-Baud (ABEO)
RX Line Status (RLS)
Transmit Holding Register empty (THRE)
RX Data Available (RDA)
Character Time-out Indicator (CTI)
Modem Status Interrupt (MSI)
Auto-Baud Time-Out (ABTO) (available in LPC2290/01 only)
End of Auto-Baud (ABEO)
Match 0 to 6 (MR0, MR1, MR2, MR3, MR4, MR5, MR6)
SI (state change)
SPIF, MODF
Rev. 03 — 16 November 2006
16/32-bit ARM microcontroller with external memory interface
LPC2290
© NXP B.V. 2006. All rights reserved.
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