STM32F103C8T6TR STMicroelectronics, STM32F103C8T6TR Datasheet - Page 21

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STM32F103C8T6TR

Manufacturer Part Number
STM32F103C8T6TR
Description
MCU ARM 64KB FLASH MEM 48-LQFP
Manufacturer
STMicroelectronics
Series
STM32r

Specifications of STM32F103C8T6TR

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
37
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
497-10048 - BOARD EVAL ACCELEROMETER497-10030 - STARTER KIT FOR STM32497-8511 - KIT STARTER FOR STM32 512K FLASH497-6438 - BOARD EVALUTION FOR STM32 512K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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0
Part Number:
STM32F103C8T6TR
0
STM32F103xx
Table 3.
1. I = input, O = output, S = supply, HiZ = high impedance.
2. FT= 5 V tolerant.
3. Function availability depends on the chosen device. Refer to
4. PC13, PC14 and PC15 are supplied through the power switch, and so their use in ouptut mode is limited: they can be used
5. Available only on devices with a Flash memory density equal or higher than 64 Kbytes.
6. This alternate function can be remapped by software to some other port pins (if available on the used package). For more
7. For the LQFP48 and LQFP64 packages, the pins number 5 and 6 are configured as OSC_IN/OSC_OUT after reset,
D8
C7
D7
C6
D6
C5
D5
D4
C4
E8
B7
B6
A7
A6
B5
A5
B4
A4
E5
F5
only in output 2 MHz mode with a maximum load of 30 pF and only one pin can be put in output mode at a time.
details, refer to the Alternate function I/O and debug configuration section in the STM32F10xxx reference manual,
UM0306, available from the STMicroelectronics website: www.st.com.
however the functionality of PD0 and PD1 can be remapped by software on these pins.
39
40
41
42
43
44
45
46
47
48
5
6
-
-
-
-
-
-
-
Pins
54
55
56
57
58
59
60
61
62
63
64 100
5
6
-
-
-
-
-
-
-
Pin definitions (continued)
81
82
83
84
85
86
87
88
89
90
91
92
93 PB7/I2C1_SDA/ TIM4_CH2 I/O
94
95
96
97
98
99
PB6/I2C1_SCL/ TIM4_CH1
PB3/JTDO/TRACESWO
PB5/I2C1_SMBAl
PD2/TIM3_ETR
PB8/TIM4_CH3
PB9/TIM4_CH4
PE0/TIM4_ETR
PB4/JNTRST
Pin name
BOOT0
V
V
PD0
PD1
PD3
PD4
PD5
PD6
PD7
PE1
DD_3
SS_3
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
S
S
I
Table 2 on page
FT
FT
FT
FT
FT
FT
FT
FT
FT
FT
FT
FT
FT
FT
FT
FT
Main function
OSC_OUT
(after reset)
OSC_IN
JNTRST
BOOT0
V
JTDO
V
7.
PD2
PD3
PD4
PD5
PD6
PD7
PB5
PB6
PB7
PB8
PB9
PE0
PE1
DD_3
SS_3
(7)
(7)
(3)
Default alternate functions
PB3/TRACESWO
TIM4_CH2
TIM4_CH3
TIM4_CH4
TIM4_CH1
I2C1_SDA
I2C1_SCL
TIM4_ETR
I2C1_SMBAl
TIM3_ETR
Pin descriptions
PB4
(5) (6)
(5) (6)
(5) (6)
(5)(6)
(6)
(6)
(5)
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