STM32F103C8T6TR STMicroelectronics, STM32F103C8T6TR Datasheet - Page 71

• Manufacturer Part Number: STM32F103C8T6TR
• Description: MCU ARM 64KB FLASH MEM 48-LQFP
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32F103C8T6TR

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
• Peripherals: DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
• Number Of I /o: 37
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• For Use With: 497-10048 - BOARD EVAL ACCELEROMETER497-10030 - STARTER KIT FOR STM32497-8511 - KIT STARTER FOR STM32 512K FLASH497-6438 - BOARD EVALUTION FOR STM32 512K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

STM32F103x8, STM32F103xB
5.3.17
Note:
Table 45.
1. Based on characterization, not tested in production.
2. Guaranteed by design, not tested in production.
3. In devices delivered in VFQFPN and LQFP packages, V
4. For external triggers, a delay of 1/f
t
STAB
Symbol
t
R
C
f
R
CONV
V
V
t
TRIG
I
t
V
CAL
connected to V
connected to V
t
f
ADC
ADC
VREF
f
latr
t
AIN
AIN
lat
REF+
ADC
S
S
DDA
(2)
(2)
(2)
(2)
(2)
(2)
(3)
(2)
(2)
(2)
(2)
(2)
Power supply
Positive reference voltage
Current on the V
ADC clock frequency
Sampling rate
External trigger frequency
Conversion voltage range
External input impedance
Sampling switch resistance
Internal sample and hold
capacitor
Calibration time
Injection trigger conversion
latency
Regular trigger conversion
latency
Sampling time
Power-up time
Total conversion time
(including sampling time)
12-bit ADC characteristics
Unless otherwise specified, the parameters given in
performed under the ambient temperature, f
conditions summarized in
It is recommended to perform a calibration after each power-up.
ADC characteristics
SSA
SSA
. Devices that come in the TFBGA64 package have a V
), see
Parameter
Table 5
REF
and
input pin
PCLK2
Figure
must be added to the latency specified in
6.
Table
See
Table 46
f
f
f
f
f
f
Doc ID 13587 Rev 12
ADC
ADC
ADC
ADC
ADC
ADC
Conditions
Equation 1
9.
= 14 MHz
= 14 MHz
= 14 MHz
= 14 MHz
= 14 MHz
= 14 MHz
REF+
for details
is internally connected to V
and
PCLK2
14 to 252 (t
successive approximation)
0 (V
tied to ground)
REF+
frequency and V
SSA
Table 45
0.107
0.05
Min
2.4
2.4
0.6
1.5
pin but no V
0
1
or V
Table
S
REF-
for sampling +12.5 for
DDA
are derived from tests
45.
5.9
83
REF-
Electrical characteristics
and V
160
DDA
Typ
pin (V
0
(1)
REF-
supply voltage
REF-
is internally
V
220
0.214
0.143
239.5
V
Max
17.1
823
3
2
3.6
REF+
is internally
14
17
50
18
DDA
1
1
8
1
(4)
(4)
(1)
1/f
1/f
1/f
1/f
1/f
1/f
MHz
MHz
Unit
kHz
µA
k
k
pF
µs
µs
µs
µs
µs
µs
V
V
V
ADC
ADC
ADC
ADC
ADC
ADC
71/96