ST10R272LT1 STMicroelectronics, ST10R272LT1 Datasheet - Page 8

• Manufacturer Part Number: ST10R272LT1
• Description: MCU 16BIT ROMLESS LV 100-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10R272LT1

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, SSP, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 77
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-TQFP, 100-VQFP
• Controller Family/series: ST10
• No. Of I/o's: 77
• Ram Memory Size: 1KB
• Cpu Speed: 50MHz
• No. Of Timers: 5
• Embedded Interface Type: SPI, USART
• No. Of Pwm Channels: 1
• Rohs Compliant: Yes
• Processor Series: ST10R2x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SSP, USART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 77
• Number Of Timers: 5
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 16 bit
• Case: QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

ST10R272L - PIN DESCRIPTION
8/77
1
ALE
EA
PORT0:
P0L.0–
P0L.7,
P0H.0 -
P0H.7
PORT1:
P1L.0–
P1L.7,
P1H.0 -
P1H.7
36
37
41 - 48
51 - 58
59- 66
67, 68
71-76
O
I
I/O
I/O
5T
5T
5T
5T
Table 1 Pin definitions
Address Latch Enable Output. Can be used for latching the
address into external memory or an address latch in the multi-
plexed bus modes.
External Access Enable pin. Low level at this pin during and
after reset forces the ST10R272L to begin instruction execu-
tion out of external memory. A high level forces execution out
of the internal ROM. The ST10R272L must have this pin tied
to ‘0’.
PORT0 has two 8-bit bidirectional I/O ports P0L and P0H. It is
bit-wise programmable for input or output via direction bits. For
a pin configured as input, the output driver is put into high-
impedance state.
For external bus configuration, PORT0 acts as address (A)
and address/data (AD) bus in multiplexed bus modes and as
the data (D) bus in demultiplexed bus modes.
PORT1 has two 8-bit bidirectional I/O ports P1L and P1H. It is
bit-wise programmable for input or output via direction bits. For
a pin configured as input, the output driver is put into high-
impedance state. PORT1 acts as a 16-bit address bus (A) in
demultiplexed bus modes and also after switching from a
demultiplexed bus mode to a multiplexed bus mode.
Demultiplexed bus modes
Multiplexed bus modes
Data Path Width:
P0L.0 – P0L.7:
P0H.0 – P0H.7:
Data Path Width:
P0L.0 – P0L.7:
P0H.0 – P0H.7:
8-bit
AD0 – AD7
A8 – A15
8-bit
D0 – D7
I/O
16-bit
AD0 - AD7
AD8 – AD15
16-bit
D0 - D7
D8 - D15