ST72F521AR9TC STMicroelectronics, ST72F521AR9TC Datasheet - Page 10

• Manufacturer Part Number: ST72F521AR9TC
• Description: IC MCU 8BIT 60K FLASH 64-TQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F521AR9TC

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 48
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: 497-6453 - BOARD EVAL BASED ON ST7LNBX
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

ST72F521, ST72521B
PIN DESCRIPTION (Cont’d)
For external pin connection guidelines, refer to See “ELECTRICAL CHARACTERISTICS” on page 165.
Legend / Abbreviations for
Type:
Input level:
In/Output level: C = CMOS 0.3V
Output level:
Port and control configuration:
Refer to
The RESET configuration of each pin is shown in bold. This configuration is valid as long as the device is
in reset state.
Table 1. Device Pin Description
10/215
10
11
12
13
14 10 PB5/ARTIC1
15 11 PB6/ARTIC2
16 12 PB7
17 13 PD0 /AIN0
18 14 PD1/AIN1
19 15 PD2/AIN2
20 16 PD3/AIN3
21
22
23 17 PD4/AIN4
– Input:
– Output:
Pin n°
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
-
-
-
-
-
-
“I/O PORTS” on page 47
PE4 (HS)
PE5 (HS)
PE6 (HS)
PE7 (HS)
PB0/PWM3
PB1/PWM2
PB2/PWM1
PB3/PWM0
PG0
PG1
PG2
PG3
PB4 (HS)/ARTCLK
PG6
PG7
Pin Name
I = input, O = output, S = supply
A = Dedicated analog input
C
T
HS = 20mA high sink (on N-buffer only)
float = floating, wpu = weak pull-up, int = interrupt
OD = open drain
T
T
= TTL 0.8V / 2V with Schmitt trigger
= CMOS 0.3V
Table
I/O C
I/O C
I/O C
I/O T
I/O T
I/O T
I/O T
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O T
I/O T
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
DD
DD
2)
for more details on the software configuration of the I/O ports.
1:
, PP = push-pull
/0.7V
/0.7V
T
T
T
T
T
T
Level
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
HS
HS
HS
HS
HS
DD
DD
with input trigger
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Input
ei3
ei3
ei3
ei
ei
ei
2
2
2
ei2
ei3
Port
X
X
X
X
X
Output
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1)
, ana = analog
function
Port E4
Port E5
Port E6
Port E7
Port B0
Port B1
Port B2
Port B3
Port G0
Port G1
Port G2
Port G3
Port B4
Port B5
Port B6
Port B7
Port D0
Port D1
Port D2
Port D3
Port G6
Port G7
Port D4
reset)
(after
Main
PWM Output 3
PWM Output 2
PWM Output 1
PWM Output 0
PWM-ART External Clock
PWM-ART Input Capture 1
PWM-ART Input Capture 2
ADC Analog Input 0
ADC Analog Input 1
ADC Analog Input 2
ADC Analog Input 3
ADC Analog Input 4
Alternate function