STM32F107VCT6 STMicroelectronics, STM32F107VCT6 Datasheet - Page 77

• Manufacturer Part Number: STM32F107VCT6
• Description: MCU ARM 256KB FLASH MEM 100-LQFP
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32F107VCT6

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: CAN, Ethernet, I²C, IrDA, LIN, SPI, UART/USART, USB OTG
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 80
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: STM32F107x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: CAN, I2C, SPI, USART
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 10
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit x 2, 16 Channel
• On-chip Dac: 12 bit x 2, 2 Channel
• For Use With: 497-10591 - DAUGHTER BOARD FOR STM32497-10064 - EVAL BOARD497-9040 - DEV KIT FOR STM32497-9041 - DEV KIT FOR STM32497-9042 - DEV KIT FOR STM32497-9043 - DEV KIT FOR STM32497-8924 - EVAL BOARD FOR STM32F107VCT497-8853 - BOARD DEMO STM32 UNIV USB-UUSCI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-8913

STM32F105xx, STM32F107xx
Table 55.
1. Guaranteed by design, not tested in production.
2. Guaranteed by characterization, not tested in production.
Figure 38. 12-bit buffered /non-buffered DAC
1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly
Offset
Gain
error
t
Update
rate
t
PSRR+
SETTLING
WAKEUP
Symbol
without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the
DAC_CR register.
(2)
(2)
(2)
(1)
(2)
(2)
Offset error
(difference between
measured value at Code
(0x800) and the ideal value =
V
Gain error
Settling time (full scale: for a
10-bit input code transition
between the lowest and the
highest input codes when
DAC_OUT reaches final
value ±1LSB
Max frequency for a correct
DAC_OUT change when
small variation in the input
code (from code i to i+1LSB)
Wakeup time from off state
(Setting the ENx bit in the
DAC Control register)
Power supply rejection ratio
(to V
measurement
DAC characteristics (continued)
REF+
DDA
/2)
) (static DC
Parameter
Buffered/Non-buffered DAC
12-bit
digital to
analog
converter
Min
Doc ID 15274 Rev 5
Buffer(1)
–67
Typ
6.5
3
DACx_OUT
Max
±0.5
±10
±12
–40
±3
10
4
1
MS/s
Unit
LSB
LSB
mV
dB
µs
µs
%
C
R
LOAD
LOAD
Given for the DAC in 12-bit
configuration
Given for the DAC in 10-bit at
V
Given for the DAC in 12-bit at
V
Given for the DAC in 12bit
configuration
C
R
C
R
C
input code between lowest and
highest possible ones.
No R
REF+
REF+
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
Electrical characteristics
= 3.6 V
= 3.6 V
 50 pF,
 5 k
 50 pF,
 5 k
 50 pF, R
, C
ai17157
Comments
LOAD
LOAD
= 50 pF
 5 k
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