ST10F276-6Q3 STMicroelectronics, ST10F276-6Q3 Datasheet - Page 169
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ST10F276-6Q3
Manufacturer Part Number
ST10F276-6Q3
Description
MCU 16BIT 832K FLASH 144-PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet
1.ST10F276-4TR3.pdf
(231 pages)
Specifications of ST10F276-6Q3
Core Processor
ST10
Core Size
16-Bit
Speed
64MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
68K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-MQFP, 144-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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ST10F276E
Note:
2
1
BTYP (bit 6 and 7) is set according to the configuration of the bit l6 and l7 of PORT0 latched
at the end of the reset sequence.
BUSCON0 is initialized with 0000h, if EA pin is high during reset. If EA pin is low during
reset, bit BUSACT0 and ALECTRL0 are set (‘1’) and bit field BTYP is loaded with the bus
configuration selected via PORT0.
RP0H (F108h / 84h)
Table 79.
1. RP0H is a read-only register.
2. These bits are set according to Port 0 configuration during any reset sequence.
3. RP0H.7 to RP0H.5 bits are loaded only during a long hardware reset. As pull-up resistors are active on
EXICON (F1C0h / E0h)
15
15
CLKSEL
EXI7ES
SALSEL
each Port P0H pins during reset, RP0H default value is “FFh”.
CSSEL
RW
WRC
Bit
14
14
(2)
(2)(3)
(2)
(2)
RPOH description
13
13
EXI6ES
RW
Write configuration control
0: Pin WR acts as WRL, pin BHE acts as WRH
1: Pins WR and BHE retain their normal function
Chip select line selection (number of active CS outputs)
00: 3 CS lines: CS2...CS0
01: 2 CS lines: CS1...CS0
10: No CS line at all
11: 5 CS lines: CS4...CS0 (Default without pull-downs)
Segment address line selection (number of active segment address outputs)
00: 4-bit segment address: A19...A16
01: No segment address lines at all
10: 8-bit segment address: A23...A16
11: 2-bit segment address: A17...A16 (Default without pull-downs)
System clock selection
000: f
001: f
010: f
011: f
100: f
101: f
110: f
111: f
12
12
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
-
11
11
EXI5ES
= 16 x f
= 0.5 x f
= 10 x f
= f
= 5 x f
= 8 x f
= 3 x f
= 4 x f
RW
OSC
10
10
OSC
OSC
OSC
OSC
(1)
OSC
OSC
OSC
EXI4ES
9
9
RW
ESFR
ESFR
8
8
EXI3ES
7
7
Function
RW
CLKSEL
R
6
6
EXI2ES
5
5
RW
SALSEL
4
4
R
EXI1ES
3
3
RW
Reset value: 0000h
Reset value: --XXh
2
2
CSSEL
Register set
R
EXI0ES
1
1
RW
169/231
WRC
R
0
0
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