ST10F276-6Q3 STMicroelectronics, ST10F276-6Q3 Datasheet - Page 198
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ST10F276-6Q3
Manufacturer Part Number
ST10F276-6Q3
Description
MCU 16BIT 832K FLASH 144-PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet
1.ST10F276-4TR3.pdf
(231 pages)
Specifications of ST10F276-6Q3
Core Processor
ST10
Core Size
16-Bit
Speed
64MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
68K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-MQFP, 144-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- Current page: 198 of 231
- Download datasheet (5Mb)
Electrical characteristics
23.8.9
23.8.10
23.8.11
198/231
Example 2
PLL Jitter
Two kinds of PLL jitter are defined:
●
●
Jitter at the PLL output is caused by:
●
●
Jitter in the input clock
PLL acts like a low pass filter for any jitter in the input clock. Input Clock jitter with the
frequencies within the PLL loop bandwidth is passed to the PLL output and higher frequency
jitter (frequency > PLL bandwidth) is attenuated at 20dB/decade.
Noise in the PLL loop
This condition again is attributed to the following sources:
●
●
Device noise of the circuit in the PLL
Long term jitter is inversely proportional to the bandwidth of the PLL: The wider the loop
bandwidth, the lower the jitter due to noise in the loop. Moreover, long term jitter is
practically independent of the multiplication factor.
The most noise sensitive circuit in the PLL circuit is definitely the VCO (Voltage Controlled
Oscillator). There are two main sources of noise: Thermal (random noise, frequency
independent thus practically white noise) and flicker (low frequency noise, 1/f). For the
frequency characteristics of the VCO circuitry, the effect of the thermal noise results in a 1/f
region in the output noise spectrum, while the flicker noise in a 1/f
PLL input and supposing that the VCO is dominated by its 1/f
–
–
–
–
–
–
Self referred single period jitter
Also called “Period Jitter”, it can be defined as the difference of the T
where T
minimum time period of the PLL output clock.
Self referred long term jitter
Also called “N period jitter”, it can be defined as the difference of T
T
minimum time difference between N + 1 clock rising edges. Here N should be kept
sufficiently large to have the long term jitter. For N = 1, this becomes the single period
jitter.
Jitter in the input clock
Noise in the PLL loop
Device noise of the circuit in the PLL
Noise in supply and substrate
max
f
P0(15:13) = ‘100’ (multiplication by 5)
PLL input frequency = 2 MHz
VCO frequency = 80 MHz
PLL output frequency = 40 MHz (VCO frequency divided by 2)
f
XTAL
CPU
is the maximum time difference between N + 1 clock rising edges and T
max
= 40 MHz (no effect of output prescaler)
= 8 MHz
is the maximum time period of the PLL output clock and T
2
noise, the R.M.S. value of the
3
. Assuming a noiseless
max
max
min
and T
and T
is the
ST10F276E
min
min
min
, where
is the
,
2
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