ST10F276-6Q3 STMicroelectronics, ST10F276-6Q3 Datasheet - Page 56
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ST10F276-6Q3
Manufacturer Part Number
ST10F276-6Q3
Description
MCU 16BIT 832K FLASH 144-PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet
1.ST10F276-4TR3.pdf
(231 pages)
Specifications of ST10F276-6Q3
Core Processor
ST10
Core Size
16-Bit
Speed
64MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
68K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-MQFP, 144-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Bootstrap loader
5.3.5
Note:
56/231
This process may go through several iterations or may directly execute the final application.
In all cases the ST10F276E still runs in BSL mode, that is, with the watchdog timer disabled
and limited access to the internal Flash area. All code fetches from the internal IFLASH area
(01’0000
access the internal Flash of the ST10F276E.
Choosing the baud rate for the BSL via UART
The calculation of the serial baud rate for ASC0 from the length of the first zero byte that is
received allows the operation of the bootstrap loader of the ST10F276E with a wide range of
baud rates. However, the upper and lower limits must be kept to ensure proper data transfer.
Equation 1
The ST10F276E uses timer T6 to measure the length of the initial zero byte. The
quantization uncertainty of this measurement implies the first deviation from the real baud
rate; the next deviation is implied by the computation of the S0BRL reload value from the
timer contents. The formula below shows the association:
Equation 2
For a correct data transfer from the host to the ST10F276E, the maximum deviation
between the internal initialized baud rate for ASC0 and the real baud rate of the host should
be below 2.5%. The deviation (F
baud rate can be calculated using the formula below:
Equation 3
Function (F
the serial communication.
This baud rate deviation is a nonlinear function depending on the CPU clock and the baud
rate of the host. The maxima of the function (F
the smaller baud rate prescaler factors and the implied higher quantization error (see
Figure
10).
H
...08’FFFF
B
) does not consider the tolerances of oscillators and other devices supporting
H
) are redirected to the special Test-Flash. Data read operations
F B
S0BRL
=
B
B
ST10F276E
, in percent) between host baud rate and ST10F276E
B Contr
--------------------------------------- -
=
B Contr
T6 36
------------------- -
72
–
–
B Host
=
------------------------------------------ -
32
,
B
) increases with the host baud rate due to
T6
⋅
⋅
(
100
S0BRL
f CPU
=
%
9
--
4
⋅
,
---------------
B Host
f CPU
+
F B
1
)
≤
2.5
%
ST10F276E
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