ST10F276-6QR3 STMicroelectronics, ST10F276-6QR3 Datasheet - Page 194

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ST10F276-6QR3

Manufacturer Part Number
ST10F276-6QR3
Description
MCU 16BIT 832K FLASH 144-PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F276-6QR3

Core Processor
ST10
Core Size
16-Bit
Speed
64MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
68K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-MQFP, 144-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Electrical characteristics
23.8.2
194/231
Definition of internal timing
The internal operation of the ST10F276E is controlled by the internal CPU clock f
edges of the CPU clock can trigger internal (for example pipeline) or external (for example
bus cycles) operations.
The specification of the external timing (AC Characteristics) therefore depends on the time
between two consecutive edges of the CPU clock, called “TCL”.
The CPU clock signal can be generated by different mechanisms. The duration of TCL and
its variation (and also the derived external timing) depends on the mechanism used to
generate f
This influence must be regarded when calculating the timings for the ST10F276E.
The example for PLL operation shown in
The mechanism used to generate the CPU clock is selected during reset by the logic levels
on pins P0.15-13 (P0H.7-5).
Figure 52. Generation mechanisms for the CPU clock
CPU
Phase locked loop operation
Direct clock drive
Prescaler operation
.
f
f
f
f
f
f
XTAL
CPU
XTAL
CPU
XTAL
CPU
Figure 52
refers to a PLL factor of 4.
TCL
TCL
TCL TCL
TCL TCL
ST10F276E
CPU
. Both

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