ST10F276-6QR3 STMicroelectronics, ST10F276-6QR3 Datasheet - Page 66

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ST10F276-6QR3

Manufacturer Part Number
ST10F276-6QR3
Description
MCU 16BIT 832K FLASH 144-PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F276-6QR3

Core Processor
ST10
Core Size
16-Bit
Speed
64MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
68K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-MQFP, 144-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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0
Bootstrap loader
5.6
5.6.1
5.6.2
Note:
5.6.3
5.6.4
66/231
Alternate boot mode (ABM)
Activation
Alternate boot is activated with the combination ‘01’ on Port0L[5..4] at the rising edge of
RSTIN.
Memory mapping
The ST10F276E has the same memory mapping for standard boot mode and for alternate
boot mode:
The alternate boot mode can be used to reprogram the whole content of the ST10F276E
User Flash (except Block 0 in Bank 2, where the alternate boot is mapped into).
Interrupts
The ST10 interrupt vector table is always mapped from address 00’0000h.
As a consequence, interrupts are not allowed in Alternate Boot Mode; all maskable and non-
maskable interrupts must be disabled.
ST10 configuration in alternate boot mode
When the ST10F276E enters BSL mode via CAN, the configuration shown in
automatically set (values that deviate from the normal reset values are marked in bold).
Table 35.
1. In Bootstrap modes (standard or alternate) ROMEN, bit 10 of SYSCON, is always set regardless of EA pin
2. BUSCON0 is initialized with 0000h, external bus disabled, if pin EA is high during reset. If pin EA is low
Watchdog timer
Register SYSCON
Context pointer CP
Register STKUN
Stack pointer SP
Register STKOV
Register BUSCON0
XPERCON
level. BYTDIS, bit 9 of SYSCON, is set according to data bus width selection via Port0 configuration.
during reset, BUSACT0, bit 10, and ALECTL0, bit 9, are set enabling the external bus with lengthened ALE
signal. BTYP field, bit 7 and 6, is set according to Port0 configuration.
Test-Flash: Mapped from 00’0000h. The Standard Bootstrap Loader can be started by
executing a jump to the address of this routine (JMPS 00’xxxx; address to be defined).
User Flash: The User Flash is divided in two parts: The IFLASH, visible only for
memory reads and memory writes (no code fetch) and the XFLASH, visible for any
ST10 access (memory read, memory write and code fetch).
All ST10F276E XRAM and Xperipherals modules can be accessed if enabled in
XPERCON register.
Function or register
ST10 configuration in alternate boot mode
Disabled
0404H
FA00
FA00
FA40
FC00
acc. to startup config.
002D
H
H
H
H
H
(1)
Access
(2)
XPEN bit set
XRAM1-2, XFlash, CAN1 enabled
Notes
Table 35
ST10F276E
is

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