MC908GR4CDWE Freescale Semiconductor, MC908GR4CDWE Datasheet - Page 64

• Manufacturer Part Number: MC908GR4CDWE
• Description: IC MCU 4K FLASH 8MHZ 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR4CDWE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 17
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: HC08
• No. Of I/o's: 21
• Ram Memory Size: 384Byte
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.2 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Break Module (BRK)
6.3.2 CPU During Break Interrupts
The CPU starts a break interrupt by:
The break interrupt begins after completion of the CPU instruction in progress. If the break address
register match occurs on the last cycle of a CPU instruction, the break interrupt begins immediately.
64
Note: Writing a logic 0 clears BW.
Addr.
$FE0A
$FE0B
$FE00
$FE03
$FE09
•
•
Loading the instruction register with the SWI instruction
Loading the program counter with $FFFC and $FFFD ($FEFC and $FEFD in monitor mode)
Break Address Register High
Break Address Register Low
SIM Break Status Register
Break Status and Control
Register Name
SIM Break Flag Control
Register (BRKSCR)
Register (SBFCR)
IAB15–IAB0
(BRKH)
(SBSR)
(BRKL)
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
Figure 6-1. Break Module Block Diagram
IAB15–IAB8
IAB7–IAB0
Figure 6-2. I/O Register Summary
BRKE
Bit 7
BCFE
Bit 15
Bit 7
BREAK ADDRESS REGISTER HIGH
BREAK ADDRESS REGISTER LOW
R
0
0
0
0
0
0
8-BIT COMPARATOR
8-BIT COMPARATOR
= Unimplemented
BRKA
14
6
R
R
0
0
0
6
0
0
13
5
R
R
0
0
0
5
0
0
0
12
4
R
R
R
1
1
0
4
0
0
0
CONTROL
= Reserved
11
R
R
3
0
0
0
3
0
0
0
10
R
R
2
0
0
0
2
0
0
0
BREAK
Freescale Semiconductor
NOTE
BW
1
R
0
9
0
1
0
0
0
Bit 0
Bit 8
Bit 0
R
R
0
0
0
0
0
0