MC908GR4CDWE Freescale Semiconductor, MC908GR4CDWE Datasheet - Page 106

IC MCU 4K FLASH 8MHZ 28-SOIC

MC908GR4CDWE

Manufacturer Part Number
MC908GR4CDWE
Description
IC MCU 4K FLASH 8MHZ 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908GR4CDWE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
17
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
HC08
No. Of I/o's
21
Ram Memory Size
384Byte
Cpu Speed
8MHz
No. Of Timers
1
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8.2 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Clock Generator Module (CGMC)
7.4.6 Programming the PLL
Technical Data
106
NOTE:
The following procedure shows how to program the PLL.
The round function in the following equations means that the real
number should be rounded to the nearest integer number.
1. Choose the desired bus frequency, f
2. Calculate the desired VCO frequency (four times the desired bus
3. Choose a practical PLL (crystal) reference frequency, f
Freescale Semiconductor, Inc.
For More Information On This Product,
Software must wait a given time, t
before selecting the PLL as the clock source to CGMOUT
(BCS = 1).
The LOCK bit is disabled.
CPU interrupts from the CGMC are disabled.
frequency).
the reference clock divider, R. Typically, the reference crystal is
32.768 kHz and R = 1.
Frequency errors to the PLL are corrected at a rate of f
stability and lock time reduction, this rate must be as fast as
possible. The VCO frequency must be an integer multiple of this
rate. The relationship between the VCO frequency, f
reference frequency, f
P, the power of two multiplier, and N, the range multiplier, are
integers.
In cases where desired bus frequency has some tolerance,
choose f
requirements (such as modules which are clocked by CGMXCLK),
cost requirements, or ideally, as high as the specified range
Clock Generator Module (CGMC)
Go to: www.freescale.com
RCLK
to a value determined either by other module
f
VCLKDES
f
VCLK
RCLK
=
, is
=
2
----------- f
P
R
4 f
N
AL
BUSDES
RCLK
, after entering tracking mode
BUSDES
MC68HC908GR8 — Rev 4.0
.
VCLK
RCLK
MOTOROLA
RCLK
, and the
/R. For
, and

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