R5F213J6CNNP#U0 Renesas Electronics America, R5F213J6CNNP#U0 Datasheet - Page 317
R5F213J6CNNP#U0
Manufacturer Part Number
R5F213J6CNNP#U0
Description
MCU 1KB FLASH 32K ROM 36-QFN
Manufacturer
Renesas Electronics America
Series
R8C/3x/3JCr
Datasheet
1.R5F213J6CNNPU0.pdf
(750 pages)
Specifications of R5F213J6CNNP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
36-WQFN Exposed Pad, 36-HWQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/3JC Group
REJ09B0602-0100 Rev.1.00
May 12, 2010
19.7.1
Notes:
1. Set to these bits when the TSTART bit in the TRCMR register is set to 0 (count stops).
2. If the pin function is set for waveform output (refer to 7.5 Port Settings), the initial output level is output when the
3. To select fOCO-F, set it to the clock frequency higher than the CPU clock frequency.
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0121h
TRCCR1 register is set.
Symbol
Symbol
Bit
CCLR
TCK0
TCK1
TCK2
TOA
TOB
TOC
TOD
Timer RC Control Register 1 (TRCCR1) in PWM2 Mode
CCLR
b7
0
TRCIOA output level select bit
TRCIOB output level select bit
TRCIOC output level select bit
TRCIOD output level select bit
Count source select bit
TRC counter clear select bit
TCK2
b6
0
Bit Name
TCK1
b5
0
(1)
TCK0
b4
(1)
(1, 2)
(1)
(1)
0
Disabled in PWM2 mode
0: Active level “H”
1: Active level “L”
Disabled in PWM2 mode
b6 b5 b4
0: Disable clear (free-running operation)
1: Clear by compare match in the TRCGRA
0 0 0: f1
0 0 1: f2
0 1 0: f4
0 1 1: f8
1 0 0: f32
1 0 1: TRCCLK input rising edge
1 1 0: fOCO40M
1 1 1: fOCO-F
TOD
b3
(Initial output “L”
“H” output by compare match in the TRCGRC
register
“L” output by compare match in the TRCGRB
register)
(Initial output “H”
“L” output by compare match in the TRCGRC
register
“H” output by compare match in the TRCGRB
register)
register
0
TOC
b2
0
(3)
Function
TOB
b1
0
TOA
b0
0
Page 286 of 715
19. Timer RC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
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