MC9S12C128CPBE Freescale Semiconductor, MC9S12C128CPBE Datasheet - Page 354

• Manufacturer Part Number: MC9S12C128CPBE
• Description: IC MCU 128K FLASH 25MHZ 52-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C128CPBE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Chapter 12 Pulse-Width Modulator (PWM8B6CV1) Block Description
12.3.2.2
The starting polarity of each PWM channel waveform is determined by the associated PPOLx bit in the
PWMPOL register. If the polarity bit is 1, the PWM channel output is high at the beginning of the cycle
and then goes low when the duty count is reached. Conversely, if the polarity bit is 0 the output starts low
and then goes high when the duty count is reached.
Read: anytime
Write: anytime
354
Module Base + 0x0001
PWME1
PWME0
PPOL5
PPOL4
Reset
Field
Field
1
0
5
4
W
R
Pulse Width Channel 1 Enable
0 Pulse width channel 1 is disabled.
1 Pulse width channel 1 is enabled. The pulse modulated signal becomes available at PWM, output bit 1 when
Pulse Width Channel 0 Enable
0 Pulse width channel 0 is disabled.
1 Pulse width channel 0 is enabled. The pulse modulated signal becomes available at PWM, output bit 0 when
Pulse Width Channel 5 Polarity
0 PWM channel 5 output is low at the beginning of the period, then goes high when the duty count is reached.
1 PWM channel 5 output is high at the beginning of the period, then goes low when the duty count is reached.
Pulse Width Channel 4 Polarity
0 PWM channel 4 output is low at the beginning of the period, then goes high when the duty count is reached.
1 PWM channel 4 output is high at the beginning of the period, then goes low when the duty count is reached.
PWM Polarity Register (PWMPOL)
0
0
7
its clock source begins its next cycle.
its clock source begins its next cycle. If CON01 = 1, then bit has no effect and PWM output line 0 is disabled.
PPOLx register bits can be written anytime. If the polarity is changed while
a PWM signal is being generated, a truncated or stretched pulse can occur
during the transition
= Unimplemented or Reserved
0
0
6
Table 12-2. PWME Field Descriptions (continued)
Figure 12-4. PWM Polarity Register (PWMPOL)
Table 12-3. PWMPOL Field Descriptions
PPOL5
MC9S12C-Family / MC9S12GC-Family
0
5
PPOL4
Rev 01.24
NOTE
0
4
Description
Description
PPOL3
0
3
PPOL2
0
2
PPOL1
Freescale Semiconductor
0
1
PPOL0
0
0