R5F21238DFP#U0 Renesas Electronics America, R5F21238DFP#U0 Datasheet - Page 395
![IC R8C/23 MCU FLASH 48-LQFP](/photos/12/38/123822/r5f21238dfp_u0_sml.jpg)
R5F21238DFP#U0
Manufacturer Part Number
R5F21238DFP#U0
Description
IC R8C/23 MCU FLASH 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Specifications of R5F21238DFP#U0
Core Size
16/32-Bit
Program Memory Size
64KB (64K x 8)
Peripherals
POR, Voltage Detect, WDT
Core Processor
R8C
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Number Of I /o
41
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
No. Of I/o's
41
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Embedded Interface Type
CAN, I2C, UART
Rohs Compliant
Yes
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
I2C/UART
Total Internal Ram Size
3KB
# I/os (max)
41
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0K521237S000BE - KIT DEV RSK R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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- Download datasheet (6Mb)
R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 18.2
Figure 18.3
Figure 18.2 shows the Bit Mapping in Byte Access and Figure 18.3 shows the Bit Mapping in Word Access. The
content of each slot remains unchanged unless transmission or reception of a new message is performed.
CAN data frame:
NOTE:
CAN data frame:
NOTE:
SID10 to 6 SID5 to 0 EID17 to 14 EID13 to 6 EID5 to 0 DLC3 to 0
SID10 to 6 SID5 to 0 EID17 to 14 EID13 to 6 EID5 to 0 DLC3 to 0
1.
1.
b7
b15
: When setting the slot for transmission, written value is read. When setting the slot for reception, 0 is read.
: When setting the slot for transmission, written value is read. When setting the slot for reception, 0 is read.
EID13
Bit Mapping in Byte Access
Bit Mapping in Word Access
Time stamp high-order byte
EID5
Page 373 of 501
EID12
SID10 SID9 SID8 SID7 SID6
Data byte 0
Data byte 2
Data byte 4
Data byte 6
EID4
EID17
EID3
EID11
SID5
EID5
EID16
EID2
Time stamp high-order byte
Time stamp low-order byte
EID15
EID1
SID10
EID10
SID4
EID4
EID14
Data byte 0
Data byte 1
Data byte 7
EID0
b8 b7
EID13
EID17
DLC3
SID9
SID3
EID9
EID3
Data byte
Data byte
EID12
0
0
Time stamp low-order byte
EID11
SID5 SID4 SID3 SID2 SID1 SID0
EID16
DLC2
SID8
SID2
EID8
EID2
Data byte
Data byte
EID10
Data byte 1
Data byte 3
Data byte 5
Data byte 7
1
1
DLC3
EID9 EID8
EID15
DLC1
SID7
SID1
EID7
EID1
DLC2
DLC1
EID7 EID6
EID14
DLC0
SID6
SID0
EID6
EID0
DLC0
b0
b0
18. CAN Module
Data byte
Data byte
7
7
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