HD6473308RCP10V Renesas Electronics America, HD6473308RCP10V Datasheet - Page 187

• Manufacturer Part Number: HD6473308RCP10V
• Description: MCU 5V 16K,PB-FREE 80-PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/330r

Specifications of HD6473308RCP10V

• Core Size: 8-Bit
• Program Memory Size: 16KB (16K x 8)
• Oscillator Type: Internal
• Core Processor: H8/300
• Speed: 10MHz
• Number Of I /o: 58
• Program Memory Type: OTP
• Ram Size: 512 x 8
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-PLCC
• No. Of I/o's: 58
• Ram Memory Size: 512Byte
• Cpu Speed: 10MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 2
• Digital Ic Case: RoHS Compliant
• Controller Family/series: H8/330
• Peripherals: ADC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply (vcc/vdd): -
• Eeprom Size: -
• Data Converters: -
• Peripherals: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The PWM timer counters can be read and written, but the write function is for test purposes only.
Application software should never write to a PWM timer counter, because this may have
unpredictable effects.
The PWM timer counters are initialized to H’00 at a reset and in the standby modes, and when the
OE bit is cleared to “0.”
8.2.2 Duty Register (DTR) – H’FFA1 (PWM0), H’FFA5 (PWM1)
Bit
Initial value
Read/Write
The duty registers (DTR) are 8-bit readable/writable registers that specify the duty factor of the
output pulse. Any duty factor from 0 to 100% can be selected, with a resolution of 1/250. Writing
0 (H’00) in a DTR gives a 0% duty factor; writing 125 (H’7D) gives a 50% duty factor; writing 250
(H’FA) gives a 100% duty factor.
The timer count is continually compared with the DTR contents. If the DTR value is not 0, when
the count increments from H’00 to H’01 the PWM output signal is set to “1.” When the count
increments past the DTR value, the PWM output returns to “0.” If the DTR value is 0 (duty factor
0%), the PWM output remains constant at “0.”
The DTRs are double-buffered. A new value written in a DTR while the timer counter is running
does not become valid until after the count changes from H’F9 to H’00. When the timer counter is
stopped (while the OE bit is “0”), new values become valid as soon as written. When a DTR is
read, the value read is the currently valid value.
The DTRs are initialized to H’FF at a reset and in the standby modes.
8.2.3 Timer Control Register (TCR) – H’FFA0 (PWM0), H’FFA4 (PWM1)
Bit
Initial value
Read/Write
R/W
R/W
OE
7
1
7
0
R/W
R/W
OS
6
1
6
0
R/W
—
—
5
1
5
1
173
R/W
—
—
4
1
4
1
R/W
—
—
3
1
3
1
CKS2
R/W
R/W
2
1
2
0
CKS1
R/W
R/W
1
1
1
0
CKS0
R/W
R/W
0
1
0
0