HD6473308RCP10V Renesas Electronics America, HD6473308RCP10V Datasheet - Page 341

• Manufacturer Part Number: HD6473308RCP10V
• Description: MCU 5V 16K,PB-FREE 80-PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/330r

Specifications of HD6473308RCP10V

• Core Size: 8-Bit
• Program Memory Size: 16KB (16K x 8)
• Oscillator Type: Internal
• Core Processor: H8/300
• Speed: 10MHz
• Number Of I /o: 58
• Program Memory Type: OTP
• Ram Size: 512 x 8
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-PLCC
• No. Of I/o's: 58
• Ram Memory Size: 512Byte
• Cpu Speed: 10MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 2
• Digital Ic Case: RoHS Compliant
• Controller Family/series: H8/330
• Peripherals: ADC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply (vcc/vdd): -
• Eeprom Size: -
• Data Converters: -
• Peripherals: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADCSR—A/D Control/Status Register
Bit
Initial value
Read/Write R/(W)*
* Software can write a “0” in bit 7 to clear the flag, but cannot write a “1” in this bit.
A/D End Flag
1 Set to “1” at the following times:
0 Cleared from “1” to “0” when CPU reads ADF = “1,” then writes “0” in ADF.
1. Single mode: at the completion of A/D conversion
2. Scan mode: when all selected channels have been converted.
A/D Interrupt Enable
0 The A/D interrupt request (ADI) is disabled.
1 The A/D interrupt request (ADI) is enabled.
0 A/D conversion is halted.
1 1. Single mode: One A/D conversion is performed, then this bit is automatically cleared to “0.”
2. Scan mode: A/D conversion starts and continues cyclically on all selected channels until “0”
is written in this bit.
ADF
7
0
ADIE
R/W
6
0
A/D Start
ADST
R/W
5
0
Scan Mode
0 Single mode
1 Scan mode
SCAN
R/W
4
0
333
Clock Select
0 Conversion time = 242 states (max)
1 Conversion time = 122 states (max)
CH2 CH1 CH0 Single mode Scan mode
0
1
Channel Select
CKS
R/W
3
0
H’FFE8
0
0
1
1
0
0
1
1
R/W
CH2
0
1
0
1
0
1
0
1
2
0
AN
AN
AN
AN
AN
AN
AN
AN
CH1
R/W
0
1
2
3
4
5
6
7
1
0
A/D
CH0
R/W
AN
AN
AN
AN
AN
AN
AN
AN
0
0
0
0
0
0
4
4
4
4
, AN
, AN
to AN
to AN
to AN
to AN
1
5
2
3
6
7