UPD78F9221CS-CAC-A Renesas Electronics America, UPD78F9221CS-CAC-A Datasheet - Page 107
UPD78F9221CS-CAC-A
Manufacturer Part Number
UPD78F9221CS-CAC-A
Description
MCU 8BIT 2KB FLASH 20PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet
1.UPD78F9221MC-5A4-A.pdf
(418 pages)
Specifications of UPD78F9221CS-CAC-A
Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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CR010 capture value
TM00 count value
Note The carry flag is set to 1. Ignore this setting.
(2) Measurement of two pulse widths with free-running counter
TI000 pin input
When 16-bit timer counter 00 (TM00) is operated in free-running mode, it is possible to simultaneously
measure the pulse widths of the two signals input to the TI000 pin and the TI010 pin.
Specify both the rising and falling edges as the valid edges of the TI000 and TI010 pins, by using bits 4 and 5
(ES000 and ES010) and bits 6 and 7 (ES100 and ES110) of PRM00.
When the valid edge specified by bits 4 and 5 (ES000 and ES010) of PRM00 is input to the TI000 pin, the
value of TM00 is taken into 16-bit timer capture/compare register 000 (CR010) and an interrupt request signal
(INTTM010) is set.
Also, when the valid edge specified by bits 6 and 7 (ES100 and ES110) of PRM00 is input to the TI010 pin, the
value of TM00 is taken into 16-bit timer capture/compare register 000 (CR000) and an interrupt request signal
(INTTM000) is set.
Sampling is performed using the count clock cycle selected by prescaler mode register 00 (PRM00), and a
capture operation is only performed when a valid level of the TI000 or TI010 pin is detected twice, thus
eliminating noise with a short pulse width.
Count clock
INTTM010
Figure 6-19. Configuration Diagram for Pulse Width Measurement by Free-Running Counter
Figure 6-20. Timing of Pulse Width Measurement Operation by Free-Running Counter
TI000/INTP0/P30
0000H
t
and One Capture Register (with Both Edges Specified)
f
f
XP
XP
0001H
/2
/2
f
XP
2
6
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
D0
(D1
D0
User’s Manual U16898EJ6V0UD
D0 + 1
D0)
t
16-bit timer capture/compare
register 010 (CR010)
D1
16-bit timer/counter 00
D1
Internal bus
D1 + 1
(TM00)
(D2
FFFFH
D1)
0000H
t
Note
INTTM010
D2
(D3
D2
D2)
t
D3
D3
105
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