UPD78F9221CS-CAC-A Renesas Electronics America, UPD78F9221CS-CAC-A Datasheet - Page 313
UPD78F9221CS-CAC-A
Manufacturer Part Number
UPD78F9221CS-CAC-A
Description
MCU 8BIT 2KB FLASH 20PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet
1.UPD78F9221MC-5A4-A.pdf
(418 pages)
Specifications of UPD78F9221CS-CAC-A
Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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An example of a program when the command execution time (from erasure to black check) should be minimized in
self programming mode is shown below.
;---------------------------------------------------------------------
;START
;---------------------------------------------------------------------
ModeOnLoop:
FlashBlockErase:
FlashBlockBlankCheck:
MOV
MOV
MOV
DI
MOV
MOV
MOV
MOV
MOV
NOP
HALT
BT
MOV
MOV
MOV
MOV
MOV
MOV
HALT
MOV
CMP
BNZ
MOV
MOV
MOV
MK0,#11111111B
MK1,#11111111B
FLCMD,#00H
PFS,#00H
PFCMD,#0A5H
FLPMC,#01H
FLPMC,#0FEH
FLPMC,#01H
PFS.0,$ModeOnLoop
FLCMD,#03H
FLAPH,#07H
FLAPL,#00H
FLAPHC,#07H
FLAPLC,#00H
WDTE,#0ACH
A,PFS
A,#00H
$StatusError
FLCMD,#04H
FLAPH,#07H
FLAPL,#00H
; Masks all interrupts
; Clears FLCMD register
; Configure settings so that the CPU clock ≥ 1 MHz
; Clears flash status register
; PFCMD register control
; FLPMC register control (sets value)
; FLPMC register control (inverts set value)
; Sets self programming mode with FLPMC register control (sets
; value)
; Sets flash control command (block erase)
; Sets number of block to be erased (block 7 is specified
; here)
; Fixes FLAPL to “00H”
; Sets erase block compare number (same value as that of
; FLAPH)
; Fixes FLAPLC to “00H”
; Clears & restarts WDT
; Self programming is started
; Checks erase error
; Performs abnormal termination processing when an error
; occurs.
; Sets flash control command (block blank check)
; Sets number of block for blank check (block 7 is specified
; here)
; Fixes FLAPL to “00H”
CHAPTER 18 FLASH MEMORY
; Repeats the same processing when an error occurs
; Checks completion of write to specific registers
User’s Manual U16898EJ6V0UD
311
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